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Z80-AIO/AIB

Hardware

Manual

Zilog

Summary of Contents for Z80-AIO

Page 1: ...Zilog Z80 AIO AIB HardwareUser s Manual Zilog yi m...

Page 2: ...ed stored in a retrieval System or transmitted in any form or by any means electronic mechanical photocopying recording or otherwise without the prior written permission of Zilog Zilog assumes no resp...

Page 3: ...Z80 AIO AIB HARDWARE USER S MANUAL 780428 REVISION A...

Page 4: ......

Page 5: ...oftware products do you have _ What is your hardware configuration including memory size _ Does this publication meet your needs GYes If not why not How do you use this publication Check all that appl...

Page 6: ...rmit No 475 Cupertino California 95014 Business Reply Mail No Postage Necessary if Mailed in the United States Postage Will Be Paid By Zilog Software Department Librarian 10460 Bubb Road Cupertino Cal...

Page 7: ...2 2 3 Installation MCZ 1 2 2 4 Power and Signal Connections 3 3 0 OPERATION 4 3 1 Introduction 4 3 2 Description 4 3 3 Address Modification 5 3 4 Input Output Handling 6 3 5 Application 7 4 0 PROGRAMM...

Page 8: ...1 Introduction 27 6 2 Description 27 6 3 Spec if ication 29 7 0 MAINTENANCE 32 7 1 Introduction 32 7 2 Drift 32 8 0 DRAWINGS 33 8 1 Introduction 33 9 0 SUPPLEMENTARY INFORMATION 40 9 1 Introduction 4...

Page 9: ...ut switching transients The Output voltage is selectable for bipolar or unipolar Operation with Output voltages ranging from 2 5V f ll scale to 10V f ll scale This analog systera is interfaced s I O t...

Page 10: ...handling during shipment If the product is damaged in any way notify the carrier immediately 2 3 Installation MCZ 1 The Analog Boards may be installed in either of the prewired I O board positions in...

Page 11: ...99 AIO 100 AIO 101 AIO 102 AIO 103 AIO 115 AIO 116 FROM MCB l 3 59 61 MCB 4 MCB 5 AIO 6 Last used IEO MCB 8 MCB 12 MCB 13 MCB 23 MCB 26 MCB 29 MCB 30 MCB 62 64 120 122 MCB 68 MCB 71 MCB 73 MCB 75 MCB...

Page 12: ...an A D conversion The CONTROL and TIMING will gate the requested analog input channel to the ANALOG MULTIPLEXER strobe the SAMPLE and HOLD AMPLIFIER and request conversion of the A D CONVERTER Upon c...

Page 13: ...ister High byte DAC 2 Register TABLE 3 3 1 PREWIRED I O ADDRESSES The board s received from the factory is wired to occupy those locations shown in Table 3 3 1 However it is possible to move the onboa...

Page 14: ...then periodically test the conversion bit in the Status register to determine v hen the conversion is complete Interrupt Mode After setting the board s PIO Interrupt enable and vector address convers...

Page 15: ...of the board These can be removed by careful manual drilling with a 0 055 54 drill All other jumpers are wire and should be sleeved wherever a possible short could occur When the r nge is changed tho...

Page 16: ...nipolar Straight Binary Digital Input Output 0 to 10V 0 to 5V 111 111 FFFH 9 9975V 4 9988 000 00 OOOH 0 0000V 0 0000V TABLE 3 5 2 2 Analog Input and Output F ll Scale Range Values 3 5 3 Differentlal S...

Page 17: ...resistor can be calculated from the following formula 20K R G l Stable 10 ppm deg C wire wound resistors should be used Increasing the amplifier gain also increases its settling time As a result the...

Page 18: ...llowed to settle to 0 01 nine time constants to maintain the f ll accuracy of the System The multiplexer time constant can be calculated with the formula Ts Rs Ron Co For a source resistance of 1k Ts...

Page 19: ...ever it is still wise to take reasonable precautions against static discharge 3 5 6 Thermocouple Temperature Acauisition Thermocouples are often used s temperature sensors for process control Systems...

Page 20: ...ermocouple cmf to be cold junction compensated Figure 3 5 6 2 shows a circuit for this purpose The Output is connected to one of the input channels to supply ambient temperature data to the System Com...

Page 21: ...w Pass Filter JMultiplexer IA 100N 100M FIGURE 3 5 6 1 Thermocouple Input System 15 20k I 10 R l Rh 430n Rd Ra kT R c R d 0 R i 7 TTln 10 Rd Ra _K Rc Rd Rh it 10 T K k q 8 67 x 10 Dual monohthii trans...

Page 22: ...th A and B Mode Control registers must be set for input mode 1 When Mode l is active data from the analog to digital Converter can be input to the processor In addition the Interrupt Enable must be tu...

Page 23: ...MODE l DISABLE PORT A INTERRUPT SET PORT B INTERRUPT INITIALIZE PORT A DATA INITIALIZE PORT B DATA SET INTERRUPT MODE 2 EI The remaining non PIO locations are programmed s follows Non PIO Location Lo...

Page 24: ...ts Low Byte location The most significant four bits of data are then loaded into the right most bit locations of the Converter s high data byte The most significant four bits of this byte are unused F...

Page 25: ...y a five digit DVM capable of 0 005 accuracy To utilize the MCB 1 system based loop test described in section 5 4 test routines 15 and 16 a test plug is used to Jumper the analog Output of DAC l to th...

Page 26: ...NT COUNT AB DEC D HAVE 100 CONVERSIONS BEEN PERFORMED JP NZ AE AF JP AD YES REPEAT END The program has been written to accommodate factory preset addresses If the board responds to other addresses the...

Page 27: ...value The contents of Register C is the number of times the conversion results did not match the reference value Ideally Register B should have a value of 64H and Register C should have a value of 0...

Page 28: ...OR SEH XX IS THE I O ADDR OF DACH I E 8DH OR 8FH Before tbe program is assembled DACL and DACH must be set to the I O addresses of the low and high bytes of the digital to analog Converter to be cali...

Page 29: ...adjust the gain control for the most positive f ll scale Output value Range Low High l LSB 10V 10 000V 9 9951V 4 8848mV 5V 5 000V 4 9976V 2 4414mV 02 5V 2 500V 2 4987V 1 2207mV 0 to 10V 0 0V 9 9975V 2...

Page 30: ...for its most negative f ll scale Output value s indicated in Table 5 3 2 RV4 is the offset adjustment control for DAC 1 Test 2 DAC l Bipolar Gain Description When the program has been run DAC l will...

Page 31: ...is RV2 Test 7 DAC 2 Unipolar Offset Description This test is performed in the same manner s Test 5 Test 8 DAC 2 Unipolar Gain Description This test is performed in the same manner s Test 6 Note Befor...

Page 32: ...t with the message message Control set Correctly and Test The offset adjustment control is RV 6 Test 10 Data Acauisition Bipolar Gain Description The gain adjustment is made in much the same manner s...

Page 33: ...t again This process is continuecl until the entire r nge of conversion is tested for that analog input channel The analog input channel is then incremented and the input r nge is again tested in its...

Page 34: ...is test operates in the same manner s Test 15 except that the program does not check the Status word but is interrupt driven Note To use Test 16 the interrupt enable input to the analog board raust be...

Page 35: ...es out 20 microseconds to allow for settling of the input multiplexers instrumentation amplifier and sample hold amplifier At the end of this time it turns the sample hold amplifier to Hold by outputt...

Page 36: ...tion amplifier Data is transferred to the Output D A Converters SMl and SM2 by writing to the board Address line ABI controls to which DAC data is written With ABO a logic 0 the eight least significan...

Page 37: ...nicity Note 3 Stability Over Temperature Note 4 System Accuracy Drift max G l Dynamic Accuracy Sample and Hold Aperature Time Aperature Time Uncertainity Differential Amplifier CMR Channel Crosstalk 3...

Page 38: ...erating Temperature Storage Temperature Relative Humidity Mechanical Length Depth Thickness Maximum Component Height Odeg C to 70deg C 25deg C to 85deg C 95 noncondensing 7 7 in 19 6 cm 7 5 in 19 1 cm...

Page 39: ...26 609 255 DESCRIPTIQN 122 pin edge 100 mil spacing 122 pin edge 100 mil spacing Analog edge Gable Analog socket NOTES 1 Includes offset errors gain errors linearity errors at gain 1 2 FSR mean F ll S...

Page 40: ...mmed resisters with a typical absolute temperature coefficient of 20 60 parts per million and a ratio temperature coefficient of 3 5 parts per million Conseouently in one year the typical drift could...

Page 41: ...SECTION 8 DRAWINGS 8 1 Introduction This section contains the scheraatic pinout lists and the asseinbly drawing for the AIO and AIO 33...

Page 42: ...J Jjj 1 f f 3jji33i u n A m w IM QBL Hf IZt t m t n 1 f l m s m H i A C17 o l l l l l l 1 1 i IM i U ff 34...

Page 43: ...35...

Page 44: ...8 20 7 19 6 18 5 17 4 16 3 15 2 14 1 CH23 RT7 CH23 RT7 CH22 RT6 CH21 RT5 CH20 RT4 CH19 RT3 CH18 RT2 CH17 RT1 CH16 RTO CH7 CH6 CHS CH4 CH3 CH2 CH1 CHO SM1 GND SM1 FB ANALOG COMMON SM2 GND SM1 OUT SM2 O...

Page 45: ...RINTED DISTRIBUTION 003 5V PRINTED DISTRIBUTION 004 IORO 005 DBS 006 IEO 007 IEI 008 DB3 009 010 011 012 DBG 013 DBO 014 015 016 017 018 019 020 021 022 023 WR 024 025 026 AB7 027 028 029 AB5 030 AB6...

Page 46: ...D DISTRIBUTION 060 5V PRINTED DISTRIBUTION 061 5V PRINTED DISTRIBUTION 062 GND PRINTED DISTRIBUTION 063 GND PRINTED DISTRIBUTION 064 GND PRINTED DISTRIBUTION 065 066 067 068 DB4 069 070 TP18 071 DB2 0...

Page 47: ...TP14 097 098 AB4 099 PHI 100 AB3 101 AB2 102 ABI 103 ABO 104 105 106 107 108 109 110 111 112 113 114 115 Ml 116 RD 117 TP2 118 119 120 GND PRINTED DISTRIBUTION 121 GND PRINTED DISTRIBUTION 122 GND PRI...

Page 48: ...ting the user s application and aid in better understanding the Operation of the analog board in a microcomputer based System 9 2 Li t of Supplementary Information Burr Brown Application Note AN 79 Bu...

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