UM012811-0904
Interrupts
eZ8 CPU
User Manual
33
POLLED INTERRUPT PROCESSING
Polled interrupt processing is supported by individually disabling the interrupts to be
polled. To initiate polled processing, check the interrupt bits of interest in the Interrupt
Request Register(s) using the Test Under Mask (TM) or similar bit test instruction. If the
bit is 1, perform a software call or branch to the interrupt service routine. Write the service
routine to service the request, reset the Interrupt Request Bit in the Interrupt Request Reg-
ister, and return or branch back to the main program. An example of a polling routine fol-
lows:
TM
IRQ1, #0010000B
; Test for interrupt request in Bit 5 of IRQ1
JR
Z, NEXT
; If no interrupt request, go to NEXT
CALL SERVICE
; If interrupt request, go to the interrupt service
; routine.
NEXT:
Other program code here
SERVICE:
; Process interrupt request
Service routine code here
AND IRQ1, #1101111B
; Clear the interrupt request in Bit 5 of IRQ1
RET
; Return to address following the CALL
Refer to the device-specific Product Specification for information on the Interrupt Request
Registers.
SOFTWARE INTERRUPT GENERATION
The eZ8 CPU generates Software Interrupts by writing to the Interrupt Request Registers
in the Register File. The Interrupt Controller and eZ8 CPU handle these software inter-
rupts in the same manner as hardware-generated interrupt requests. To generate a Software
Interrupt, write a 1 to the desired interrupt request bit in the selected Interrupt Request
Register. As an example, the following instruction
OR IRQ1, #0010000B
writes a 1 to Bit 5 of Interrupt Request Register 1. If this interrupt at Bit 5 is enabled and
there are no higher priority pending interrupt requests, program control transfers to the
interrupt service routine specified by the corresponding Interrupt Vector.
For more information on the Interrupt Controller and Interrupt Request Registers, refer to
the device-specific Product Specification.
