Z3 Technology HE4K-DCK-10, Hardware Specification

Page: 15 / 25

15
HE4K-DCK-10
HARDWARE SPECIFICATION
CONFIDENTIAL DOC-USR-0100-01
____________________________________________________________________________________
Z3 Technology, LLC ♦ 100 N. 8th St. STE 250 ♦ Lincoln, NE 68508-1369 USA ♦ +1.402.323.0702
7.1.2 J2 – External HDMI Video Input
Connector J2 allows for an external HDMI source to be connected to the encoder.
The pin assignments are standard per HDMI specification and shown in the table below.
Pin Signal Pin Signal
1 Hot Plug Detect 11 Data0-
2 Utility 12 Clock+
3 Data2+ 13 Gnd
4 Gnd 14 Clock-
5 Data2- 15 CEC
6 Data1+ 16 GND
7 Gnd 17 DDC_CLK
8 Data1- 18 DDC_DAT
9 Data0+ 19 +5V
10 Gnd
Table 4 IFE PCB J2 Pin Out
7.1.3 J3 – FPGA JTAG
J3 is a debug connector providing access to the JTAG port of the FPGA. Its pin assignment is shown in
that table below.
This connector is usually not placed on the PCB.
Pin Signal Pin Signal
1 TMS 4 TCK
2 TDI 5 GND
3 TDO 6 +3.3V
Table 5 IFE PCB J3 Pin Out
7.1.4 J4 – Connection with Main Encoder PCB
Connector J4, located on the bottom side of the PCB, provides all the connectivity between the IFE
board and the encoder board. Even numbered pins 2 to 22 provide access to the FPG for
configuration and control.