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CLM920_NC3_LTE Module hardware manual
Shanghai Yuge Information Technology co., LTD
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3.4.2 Boot timing
Figure 3-7 Startup timing diagram
Table 3-6 Boot timing parameters
Symbol
Description
Min
Typical Max Unit
Ton
Boot low level width
100
500
-
ms
Ton(status) Boot time (according to status status)
22
-
-
ms
Ton(usb)
Boot time (according to usb status)
-
10
-
s
Ton(uart)
Boot time (according to uart status)
-
6
-
s
VIH
PWRKEY input high level
0.6
0.8
1.8
V
VIL
PWRKEY input low level
-0.3
0
0.5
V
It is recommended to use the open-collector drive circuit to control PWRKEY, which can
be released after pulling the base level for 500ms, and the module is powered on. Switching
machine design can also be done with buttons, button accessories need to be placed with a
TVS tube for ESD protection.