1-3
IM 253710-01E
Functions
1
PZ4000 main unit Model : 253710
Element
1
Element
2
Element
3
Element
4
A/D data
Acquisition
Acquisition
Control
Logic
TRG OUT
TRG IN
EXT CLK
EXT TRG OUT
EXT TRG IN
EXT CLK IN
Optional Memory
1 MW-4 MW/CH
Standard
DSP
CPU
4 MB
Main memory
Display
ASIC
Internal
Printer
(option)
6.4 Color
LCD
Display
RAM
FDD
SCSI(option)
GP-IB
Serial(RS-232)
Centronics
ACQ-memory
100 kW/CH
Optional Memory
1 MW-4 MW/CH
Standard
ACQ-memory
100 kW/CH
Processing
Data
Acquisition
Processing
Data
ZCD data
U1
I1
U1
I1
A/D data
ZCD data
U2
I2
U2
I2
A/D data
ZCD data
U3
I3
U3
I3
A/D data
ZCD data
U4
I4
U4
I4
SRAM
Signal Flow and Process
Power measurement module Model : 253751 / 253752
A voltage signal that is applied to the voltage input terminal (U,
±
) of the power
measurement module is normalized using the voltage divider of the input circuit and
an operational amplifier (OP AMP). It is then input to the A/D converter and the zero
crossing detector.
There are two ways in which current signals can be input to the 253751. One way
utilizes a current sensor input connector (Current Sensor) that inputs voltage signals
from an external current sensor. The other way utilizes a current input terminal (I,
±
)
which is used to directly input the current signal. (There are three systems on the
253752, two current input terminals and one current sensor.) For current sensor
input, the input voltage is normalized using the voltage divider and OP amp. For the
direct input, the signal applied to the current input terminal is converted to voltage
using a current divider and then is normalized in the same manner as the current
sensor input. The normalized voltage is then input to an A/D converter and zero
crossing detector of the same type and configuration as those to which voltage
signals are sent.
The A/D converter samples the voltage/current input signals using the sampling clock
provided by the internal circuit of the 253710, converting the signals to digital data.
The sampling rate is fixed to 5 MS/s for the normal measurement mode, and integer
multiples of the PLL source
*
for the harmonic measurement mode (approx. 80 k to
160 kS/s). The sampling operation can also be carried out using a clock signal that is
applied to the external clock input connector.
*
When measuring harmonics, the fundamental frequency must be determined in order to
analyze the higher orders. The PLL (phase locked loop) source is the signal that is used
to determine the fundamental frequency.
1.1 System Configuration and Block Diagram
