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4.4 Addressing
4.4.1 Overview
To provide specific addressing of the installed peripheral modules, certain addresses
must be allocated in the CPU. This address mapping is in the CPU as hardware configu-
ration. If there is no hardware configuration, depending on the slot, the CPU assigns
automatically peripheral addresses for digital in-/output modules starting with 0 and
analog modules are assigned to even addresses starting with 256.
4.4.2 Default address assignment of the I/O part
Sub module
Input
address
Access
Description
AI5/AO2
800
WORD
Analog input channel 0 (X4)
802
WORD
Analog input channel 1 (X4)
Sub module
Input
address
Access
Description
DI24/DO16
136
BYTE
Digital input I+0.0 ... I+0.7 (X4)
137
BYTE
Digital input I+1.0 ... I+1.7 (X4)
Sub module
Input
address
Access
Description
Counter
816
DINT
Channel 0: Counter value / Frequency value
820
DINT
Channel 1: Counter value / Frequency value
824
DINT
Channel 2: Counter value / Frequency value
828
DINT
Channel 3: Counter value / Frequency value
Sub module
Output
address
Access
Description
DI24/DO16
136
BYTE
Digital output Q+0.0 ... Q+0.7 (X5)
137
BYTE
Digital output Q+1.0 ... Q+1.3 (X5)
Sub module
Output
address
Access
Description
Counter
816
DWORD
reserved
820
DWORD
reserved
824
DWORD
reserved
828
DWORD
reserved
VIPA System SLIO
Deployment CPU 013-CCF0R00
Addressing > Default address assignment of the I/O part
HB300 | CPU | 013-CCF0R00 | en | 19-30
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