5.6.5 Counter operating modes
5.6.5.1
Count continuously
n
In this operating mode the counter counts starting with the
load value
.
n
When the counter counts forward and reaches the upper count limit and another
counting pulse in positive direction arrives, it jumps to the lower count limit and counts
from there on.
n
When the counter counts backwards and reaches the lower count limit and another
counting pulse in negative direction arrives, it jumps to the upper count limit and
counts from there on.
n
The counter limits are fix set to maximum range.
n
With overflow or underflow the status bits STS_OFLW respectively STS_UFLW in the
SFB 47 are set. These bits remain set until these are reset with RES_STS. If enabled
additionally a hardware interrupt is triggered.
Limits
Valid range of values
Lower count limit
-2 147 483 648 (-2
31
)
Upper count limit
+2 147 483 647 (2
31
-1)
VIPA System MICRO
Deployment I/O periphery
Counting > Counter operating modes
HB400 | CPU | M13-CCF0000 | en | 16-47
104
