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6.5.2 SFB 47 - COUNT - Counter controlling

The SFB 47 is a specially developed block for compact CPUs for controlling of the coun-

ters. The SFB is to be called with the corresponding instance DB. Here the parameters of

the SFB are stored. With the SFB COUNT (SFB 47) you have following functional

options:

Start/Stop the counter via software gate

SW_GATE

Enable/control digital output DO

Read the status bit

Read the actual count and latch value

Request to read/write internal counter registers

Name

Data type

Address

(Instance

DB)

Default value

Comment

LADDR

WORD

0.0

300h

This parameter is not evaluated. Always the internal

I/O periphery is addressed.

CHANNEL

INT

2.0

Channel number

SW_GATE

BOOL

4.0

FALSE

Enables the Software gate

CTRL_DO

BOOL

4.1

FALSE

Enables the output

False: Standard Digital Output

SET_DO

BOOL

4.2

FALSE

Parameter is not evaluated

JOB_REQ

BOOL

4.3

FALSE

Initiates the job (edge 0-1)

JOB_ID

WORD

6.0

Job ID

JOB_VAL

DINT

8.0

Value for write jobs

STS_GATE

BOOL

12.0

FALSE

Status of the internal gate

STS_STRT

BOOL

12.1

FALSE

Status of the hardware gate

STS_LTCH

BOOL

12.2

FALSE

Status of the latch input

STS_DO

BOOL

12.3

FALSE

Status of the output

STS_C_DN

BOOL

12.4

FALSE

Status of the down-count

Always indicates the last direction of count. After

the first SFB call

STS_C_DN

is set FALSE.

STS_C_UP

BOOL

12.5

FALSE

Status of the up-count

Always indicates the last direction of count. After

the first SFB call

STS_C_UP

is set TRUE.

COUNTVAL

DINT

14.0

Actual count value

LATCHVAL

DINT

18.0

Actual latch value

JOB_DONE

BOOL

22.0

TRUE

New job can be started

JOB_ERR

BOOL

22.1

FALSE

Job error

JOB_STAT

WORD

24.0

Job error ID

Description

Parameters

VIPA System 300S

Deployment I/O periphery

Counter > SFB 47 - COUNT - Counter controlling

HB140 | CPU-SC | 312-5BE23 | en | 18-45

Summary of Contents for VIPA System 300S+

Page 1: ...CPU SC 312 5BE23 Manual HB140 CPU SC 312 5BE23 en 18 45 VIPA System 300S SPEED7 CPU 312SC www vipa com en service support manuals ...

Page 2: ...312 5BE23_000_CPU SC 312SC 4 EN 2018 VIPA GmbH Ohmstr 4 91074 Herzogenaurach Telephone 49 9132 744 0 Fax 49 9132 744 1864 Email info vipa com Internet www vipa com ...

Page 3: ...emory management 29 4 2 5 Slot for storage media 29 4 2 6 Battery backup for clock and RAM 30 4 2 7 Operating mode switch 30 4 2 8 LEDs 31 4 3 Technical data 33 5 Deployment CPU 312 5BE23 44 5 1 Assembly 44 5 2 Start up behavior 44 5 3 Addressing 45 5 3 1 Overview 45 5 3 2 Addressing Backplane bus I O devices 45 5 4 Address assignment 47 5 5 Hardware configuration CPU 47 5 6 Hardware configuration...

Page 4: ...cy measurement 106 6 6 1 Overview 106 6 6 2 Inputs for the frequency measurement 106 6 6 3 Parameterization 108 6 6 4 SFB 48 FREQUENC Frequency measurement 109 6 7 Pulse width modulation PWM 111 6 7 1 Overview 111 6 7 2 Parameterization 113 6 7 3 SFB 49 PULSE Pulse width modulation 115 6 8 Diagnostic and interrupt 122 6 8 1 Process interrupt 123 6 8 2 Diagnostic interrupt 124 7 Deployment PtP comm...

Page 5: ...ironment 156 9 1 1 General 156 9 1 2 Work environment of the TIA Portal 157 9 2 TIA Portal Hardware configuration CPU 158 9 3 TIA Portal Hardware configuration I O modules 159 9 4 TIA Portal Hardware configuration Ethernet PG OP channel 160 9 5 TIA Portal VIPA Include library 163 9 6 TIA Portal Project transfer 164 Appendix 166 A System specific event IDs 168 B Integrated blocks 216 C SSL partial ...

Page 6: ...may be included for units which are not present at the customer site The exact scope of delivery is described in the respective purchase contract Hereby VIPA GmbH declares that the products and systems are in compliance with the essential requirements and other relevant provisions Conformity is indicated by the CE marking affixed to the product For more information regarding CE marking and Declara...

Page 7: ...A It contains a description of the construction project implementation and usage Product Order number as of state CPU HW CPU FW CPU 312SC 312 5BE23 01 V3 7 3 The manual is targeted at users who have a background in automation technology The manual consists of chapters Every chapter provides a self contained description of a specific topic The following guides are available in the manual n An overa...

Page 8: ...el in the n project design department n installation department n commissioning n operation CAUTION The following conditions must be met before using or commis sioning the components described in this manual Hardware modifications to the process control system should only be carried out when the system has been disconnected from power Installation and hardware modifications only by properly traine...

Page 9: ...hat have been damaged by electrostatic discharges can fail after a temperature change mechanical shock or changes in the electrical load Only the consequent implementation of protection devices and meticulous attention to the applicable rules and regulations for handling the respective equipment can prevent failures of electrostatic sensitive modules Modules must be shipped in the original packing...

Page 10: ... handled by the CPU in accordance with their priority Since a timer or an alarm event requires a quick reaction the CPU will interrupt the cyclic pro cessing when these high priority events occur to react to the event Cyclic processing will resume once the reaction has been processed This means that cyclic processing has the lowest priority 2 2 2 Applications The program that is present in every C...

Page 11: ...uble words In your program you may load cells of the timer with a value between 10ms and 9990s As soon as the user application executes a start operation the value of this timer is decremented by the interval that you have specified until it reaches zero You may load counter cells with an initial value max 999 and increment or decrement these when required A data block contains constants or variab...

Page 12: ...e CPU has a RS485 interface which is fix set to PtP communication point to point This supports the serial process connection to different source or destination systems The CPU has an Ethernet interface for PG OP communication After assigning IP address parameters with your configuration tool via the PLC functions you may directly access the Ethernet PG OP channel and program res remote control you...

Page 13: ...e Insulation voltage to reference earth Inputs outputs AC DC 50V test voltage AC 500V Protective measures against short circuit Environmental conditions to EN 61131 2 Climatic Storage transport EN 60068 2 14 25 70 C Operation Horizontal installation hanging EN 61131 2 0 60 C Horizontal installation lying EN 61131 2 0 55 C Vertical installation EN 61131 2 0 50 C Air humidity EN 60068 2 30 RH1 witho...

Page 14: ...erity 2 EN 61000 4 3 HF field immunity casing 80MHz 1000MHz 10V m 80 AM 1kHz 1 4GHz 2 0GHz 3V m 80 AM 1kHz 2GHz 2 7GHz 1V m 80 AM 1kHz EN 61000 4 6 HF conducted 150kHz 80MHz 10V 80 AM 1kHz EN 61000 4 4 Burst degree of severity 3 EN 61000 4 5 Surge degree of severity 3 Due to the high energetic single pulses with Surge an appropriate external protective circuit with lightning protection elements li...

Page 15: ...ines 3 1 Installation dimensions 2tier width WxHxD in mm 80 x 125 x 120 Dimensions Basic enclo sure Installation dimensions VIPA System 300S Assembly and installation guidelines Installation dimensions HB140 CPU SC 312 5BE23 en 18 45 15 ...

Page 16: ...0 140 10 390 1AE80 482 466 8 3 390 1AF30 530 500 15 390 1AJ30 830 800 15 390 9BC00 2000 Drillings only left 15 Unit pack 10 pieces Measures in mm For the communication between the modules the System 300S uses a backplane bus connector Backplane bus connectors are included in the delivering of the peripheral modules and are clipped at the module from the backside before installing it to the profile...

Page 17: ...ctor has to be 10mm2 5 Stick the power supply to the profile rail and pull it to the left side to the grounding bolt of the profile rail 6 Fix the power supply by screwing 7 Take a backplane bus connector and click it at the CPU from the backside like shown in the picture 8 Stick the CPU to the profile rail right from the power supply and pull it to the power supply 9 Click the CPU downwards and b...

Page 18: ...ction of 0 08mm2 to 2 5mm2 may be connected You can use flexible wires without end case as well as stiff wires 1 Test point for 2mm test tip 2 Locking orange for screwdriver 3 Round opening for wires The picture on the left side shows the cabling step by step from top view 1 For cabling you push the locking vertical to the inside with a suiting screwdriver and hold the screwdriver in this position...

Page 19: ...h the cabling from bottom to top res from top to bottom if the cables should be led out at the top 5 Bolt also the connection screws of not cabled screw clamps 6 Put the included cable binder around the cable bundle and the front connector 7 Fix the cable binder for the cable bundle 8 Bolt the fixing screw of the front connector 9 Now the front connector is electrically connected with your module ...

Page 20: ...erference cause interferences to your control occur by means of different coupling mechanisms There are n galvanic coupling n capacitive coupling n inductive coupling n radiant coupling In the most times it is enough to take care of some elementary rules to guarantee the EMC Please regard the following basic rules when installing your PLC n Take care of a correct area wide grounding of the inactiv...

Page 21: ...r is impedance low because otherwise the interference currents may appear as interference cause When isolating cables you have to regard the following n If possible use only cables with isolation tangle n The hiding power of the isolation should be higher than 80 n Normally you should always lay the isolation of cables on both sides Only by means of the both sided connection of the isolation you a...

Page 22: ...or operating state and diagnostics n Real time clock battery buffered n Digital I Os DI 16xDC24V DO 8xDC 24V 0 5A n 2 channels for counter frequency measurement and pulse width modulation n I O address range digital analog 1024byte n 512 timer n 512 counter n 8192 flag byte Type Order number Description 312SC 312 5BE23 MPI interface card slot real time clock Ethernet interface for PG OP DI 16xDC24...

Page 23: ...O part 4 Operating mode switch CPU 5 Slot for DC 24V power supply 6 Twisted pair interface for Ethernet PG OP channel 7 PtP interface 8 MPI interface The components 5 8 are under the front flap CPU 312 5BE23 VIPA System 300S Hardware description Structure General HB140 CPU SC 312 5BE23 en 18 45 23 ...

Page 24: ...y is protected against polarity inversion and overcurrent n The internal electronic is galvanically connected with the supply voltage 9pin SubD jack n The MPI interface serves for the connection between programming unit and CPU n By means of this the project engineering and programming happens n MPI serves for communication between several CPUs or between HMIs and CPU n Standard setting is MPI Add...

Page 25: ...ns of the SFC 216 SER_CFG The communication happens by means of the SFC 217 SER_SND and SFC 218 SER_RCV 8pin RJ45 jack n The RJ45 jack serves the interface to the Ethernet PG OP channel n This interface allows you to program res remote control your CPU to access the internal web site or to connect a visualization n Configurable connections are not possible n For online access to the CPU via Ethern...

Page 26: ...l Input 16xDC 24V with interrupt capability n Digital Output 8xDC 24V 0 5A n Technological functions 2 channels CAUTION Please regard that the voltage at an output channel is always the supply voltage connected to L Overview VIPA System 300S Hardware description Structure In Output area CPU 312 5BE23 HB140 CPU SC 312 5BE23 en 18 45 26 ...

Page 27: ...0 3 Channel 1 A Pulse 6 I 0 4 Channel 1 B Direction 7 I 0 5 Channel 1 HW gate 8 I 0 6 9 I 0 7 10 not used 11 not used 12 I 1 0 13 I 1 1 14 I 1 2 15 I 1 3 16 I 1 4 Channel 0 Latch 17 I 1 5 Channel 1 Latch 18 I 1 6 19 I 1 7 20 Ground 1M DI VIPA System 300S Hardware description Structure In Output area CPU 312 5BE23 HB140 CPU SC 312 5BE23 en 18 45 27 ...

Page 28: ... is recognized and the according LED is activated Pin assignment X11 DO Pin Assignment 21 2L Power supply DC 24V 22 O 0 0 Channel 0 Output 23 O 0 1 Channel 1 Output 24 Q 0 2 25 Q 0 3 26 Q 0 4 27 Q 0 5 28 Q 0 6 29 Q 0 7 30 Ground 2M DO 31 40 not used VIPA System 300S Hardware description Structure In Output area CPU 312 5BE23 HB140 CPU SC 312 5BE23 en 18 45 28 ...

Page 29: ...memory to its maximum printed capacity 1MB by means of a memory extension card 4 2 5 Slot for storage media At this slot the following storage media can be plugged n SD respectively MCC Multimedia card External memory card for programs and firmware n MCC Memory configuration card External memory card MMC for programs and firmware with the possibility to unlock additional work memory The additional...

Page 30: ...for max 30 days CAUTION After a power reset and with an empty battery the CPU starts with a BAT error and executes an overall reset The loading procedure is not influenced by the BAT error The BAT error can be deleted again if once during power cycle the time between switching on and off the power supply is at least 30sec and the battery is fully loaded Otherwise with a short power cycle the BAT e...

Page 31: ...rmation can be found in the diagnostics buffer of the CPU X X X X Variables are forced X X X X Accessing the memory card X 10Hz Configuration is loaded Overall reset 2Hz X X X Overall reset is requested 10Hz X X X Overall reset is executed Factory reset Reset to factory setting is executed Reset to factory setting finished without error Firmware update 2Hz 2Hz The alternate blinking indicates that...

Page 32: ... There is no physical connection flickers X Shows Ethernet activity The Ethernet interface of the Ethernet PG OP channel has a transfer rate of 100Mbit The Ethernet interface of the Ethernet PG OP channel has a transfer rate of 10Mbit not relevant X VIPA System 300S Hardware description Structure LEDs HB140 CPU SC 312 5BE23 en 18 45 32 ...

Page 33: ...ain at backplane bus 3 A Max current drain load supply Power loss 8 W Technical data digital inputs Number of inputs 16 Cable length shielded 1000 m Cable length unshielded 600 m Rated load voltage DC 24 V Reverse polarity protection of rated load voltage ü Current consumption from load voltage L without load 70 mA Rated value DC 24 V Input voltage for signal 0 DC 0 5 V Input voltage for signal 1 ...

Page 34: ...tage signal 1 at min current L 0 8 V Output voltage signal 1 at max current L 0 8 V Output current at signal 1 rated value 0 5 A Signal logic output Sinking output Output current permitted range to 40 C 5 mA to 0 6 A Output current permitted range to 60 C 5 mA to 0 6 A Output current at signal 0 max residual current 0 5 mA Output delay of 0 to 1 100 µs Output delay of 1 to 0 100 µs Minimum load cu...

Page 35: ...imit voltage ranges with SFU Destruction limit voltage Current inputs Max input resistance current range Input current ranges Operational limit of current ranges Operational limit of current ranges with SFU Basic error limit current ranges Radical error limit current ranges with SFU Destruction limit current inputs electrical current Destruction limit current inputs voltage Resistance inputs Resis...

Page 36: ...n External temperature compensation Internal temperature compensation Technical unit of temperature measurement Resolution in bit Measurement principle Basic conversion time Noise suppression for frequency Initial data size Technical data analog outputs Number of outputs Cable length shielded Rated load voltage Reverse polarity protection of rated load voltage Current consumption from load voltage...

Page 37: ...version time Substitute value can be applied Output data size Technical data counters Number of counters 2 Counter width 32 Bit Maximum input frequency 10 kHz Maximum count frequency 10 kHz Mode incremental encoder ü Mode pulse direction ü Mode pulse ü Mode frequency counter ü Mode period measurement ü Gate input available ü Latch input available ü Reset input available Counter output available ü ...

Page 38: ...hannel error display red LED per group Isolation Between channels ü Between channels of groups to 16 Between channels and backplane bus ü Between channels and power supply Max potential difference between circuits DC 75 V AC 50 V Max potential difference between inputs Ucm Max potential difference between Mana and Mintern Uiso Max potential difference between inputs and Mana Ucm Max potential diff...

Page 39: ... data blocks size 64 KB Max local data size per execution level 510 Byte Blocks Number of OBs 15 Number of FBs 2048 Number of FCs 2048 Maximum nesting depth per priority class 8 Maximum nesting depth additional within an error OB 4 Time Real time clock buffered ü Clock buffered period min 6 w Accuracy max deviation per day 10 s Number of operating hours counter 8 Clock synchronization ü Synchroniz...

Page 40: ...cation ü S7 basic communication user data per job 76 Byte S7 communication ü S7 communication as server ü S7 communication as client S7 communication user data per job 160 Byte Number of connections max 32 PWM data PWM channels 2 PWM time basis 0 1 ms 1 ms Period length 4 65535 1 65535 time base Minimum pulse width 0 0 5 Period duration Type of output Highside with 1 1kOhm pulldown Functionality S...

Page 41: ... Functionality MPI Number of connections max 32 PG OP channel ü Routing Global data communication ü S7 basic communication ü S7 communication ü S7 communication as server ü S7 communication as client Transmission speed min 19 2 kbit s Transmission speed max 187 5 kbit s Functionality PROFIBUS master Number of connections max PG OP channel Routing S7 basic communication S7 communication S7 communic...

Page 42: ...as client Direct data exchange slave to slave communication DPV1 Transmission speed min Transmission speed max Automatic detection of transmission speed Transfer memory inputs max Transfer memory outputs max Address areas max User data per address area max Functionality RJ45 interfaces Type X5 Type of interface Ethernet 10 100 MBit Connector RJ45 Electrically isolated ü PG OP channel ü Number of c...

Page 43: ...USS master protocol ü Modbus master protocol ü Modbus slave protocol Special protocols Housing Material PPE Mounting Rail System 300 Mechanical data Dimensions WxHxD 80 mm x 125 mm x 120 mm Net weight 410 g Weight including accessories Gross weight Environmental conditions Operating temperature 0 C to 60 C Storage temperature 25 C to 70 C Certifications UL certification yes KC certification yes VI...

Page 44: ...nsferred from the memory card into the work memory of the CPU If no memory card is plugged the CPU transfers permanent stored protected blocks into the work memory if available n Depending on the position of the operating mode switch the CPU switches to RUN if OB 81 exists res remains in STOP This event is stored in the diagnostic buffer as Start overall reset automatically unbuffered PowerON CAUT...

Page 45: ...atically when a cycle has been completed Maximally 8 modules may be addressed by the CPU 312 5BE23 The extension by means of extension racks is not possible You may access the modules with read res write accesses to the peripheral bytes or the process image To define addresses a hardware configuration may be used For this click on the properties of the according module and set the wanted address I...

Page 46: ...hows the functionality of the automatic address allocation Example for automatic address allocation VIPA System 300S Deployment CPU 312 5BE23 Addressing Addressing Backplane bus I O devices HB140 CPU SC 312 5BE23 en 18 45 46 ...

Page 47: ...the Siemens SIMATIC Manager It serves for project engi neering The modules which may be configured here are listed in the hardware catalog If necessary you have to update the hardware catalog with Options è Update Catalog For project engineering a thorough knowledge of the Siemens SIMATIC Manager and the Siemens hardware configurator is required Please consider that this SPEED7 CPU has 4 ACCUs Aft...

Page 48: ...ule you want to parameterize In the appearing dialog window you may set the wanted parameters By using the SFCs 55 56 and 57 you may alter and transfer param eters for wanted modules during runtime For this you have to store the module specific parameters in so called record sets More detailed information about the structure of the record sets is to find in the according module description Maximal...

Page 49: ...l This always may be found as 1 address under the front flap of the CPU on a sticker on the left side You get valid IP address parameters from your system administrator The assignment of the IP address data happens online in the Siemens SIMATIC Manager starting with ver sion V 5 3 SP3 with the following proceeding 1 Start the Siemens SIMATIC Manager and set via Options è Set PG PC interface the ac...

Page 50: ...ur project 5 8 CPU parametrization 5 8 1 Parametrization via Siemens CPU Since the CPU is to be configured as Siemens CPU 312C 6ES7 312 5BE03 0AB0 V2 6 in the Siemens hardware configurator the parameters of the CPU 312 5BE23 may be set with Object properties of the CPU 312C during hardware configuration Via a double click on the CPU 312C the parameter window of the CPU may be accessed Using the re...

Page 51: ... module after PowerON If the modules do not send a ready message to the CPU by the time the monitoring time has expired the actual configuration becomes unequal to the preset configura tion n Transfer of parameters to modules 100ms The maximum time for the transfer of parameters to parameterizable modules If not every module has been assigned parameters by the time this monitoring time has expired...

Page 52: ...iorities may be specified according to which the corresponding cyclic interrupt is processed With priority 0 the corresponding interrupt is deacti vated n Execution Enter the time intervals in ms in which the watchdog interrupt OBs should be processed The start time for the clock is when the operating mode switch is moved from STOP to RUN n Phase offset Enter the delay time in ms for current execu...

Page 53: ...se of the address 0 is reserved for programming devices A cable has to be terminated with its surge impedance For this you switch on the termi nating resistor at the first and the last participant of a network or a segment Please make sure that the participants with the activated terminating resistors are always power sup plied Otherwise it may cause interferences on the bus 1 MPI programming cabl...

Page 54: ... the Ethernet PG OP channel for connection Provided that no new hardware configura tion is transferred to the CPU the entered Ethernet connection is permanently stored in the project as transfer channel 5 With OK the transfer is started System dependent you get a message that the projected system differs from target system This message may be accepted by OK Your project is transferred and may be e...

Page 55: ...ead from the memory card after overall reset AUTOLOAD WLD is read from the memory card after PowerON The short flashing of the MC LED of the CPU indicates the transfer process Please regard that your user memory serves for enough space for your user program otherwise your user program is not completely loaded and the SF LED gets on VIPA System 300S Deployment CPU 312 5BE23 Project transfer Transfe...

Page 56: ... web page only shows information The shown values cannot be changed Here order number serial number and the version of firmware and hardware of the CPU are listed Expert View takes you to the advanced Expert View Info Expert View Runtime Information Operation Mode STOP CPU Status information Mode Switch RUNP System Time 01 09 09 00 35 30 812 CPU Date time OB1 Cycle Time cur 0us min 0us max 0us avg...

Page 57: ...55 0 Gateway Address 172 16 129 210 MAC Address 00 20 D5 77 30 36 CPU Firmware Information File System V1 0 2 Information for the support PRODUCT VIPA 312 5BE23 V3 7 3 Px000275 pkg Name firmware version package HARDWARE V0 1 0 0 5679H V20 HX000027 110 CPU Information for the support Bx000227 V6 6 29 255 Ax000086 V1 2 1 0 Ax000056 V0 2 2 0 fx000007 wld V1 1 8 0 ARM Processor Load Last Value 0 Maxim...

Page 58: ...ware Information PRODUCT VIPA DI16 DO8 V3 2 9 0 Name firmware version Data Input data Offset Width Value dec Value hex 124 1 0 00 125 1 0 00 Data Output data Offset Width Value dec Value hex New Value hex 124 1 0 00 00 Info Overview VIPA System 300S Deployment CPU 312 5BE23 Accessing the web server HB140 CPU SC 312 5BE23 en 18 45 58 ...

Page 59: ... 22 Name firmware version Data Input data 16byte Offset Width Value dec Value hex 768 1 0 00 769 1 0 00 770 1 0 00 771 1 0 00 772 1 0 00 773 1 0 00 774 1 0 00 775 1 0 00 776 1 0 00 777 1 0 00 778 1 0 00 779 1 0 00 780 1 0 00 781 1 0 00 782 1 0 00 783 1 0 00 Info Overview VIPA System 300S Deployment CPU 312 5BE23 Accessing the web server HB140 CPU SC 312 5BE23 en 18 45 59 ...

Page 60: ...0 00 774 1 0 00 775 1 0 00 776 1 0 00 777 1 0 00 778 1 0 00 779 1 0 00 780 1 0 00 781 1 0 00 782 1 0 00 783 1 0 00 VBUS Digital In Out 16 Data Input data Offset Width Value dec Value hex 0 1 0 00 1 1 0 00 Info Overview VIPA System 300S Deployment CPU 312 5BE23 Accessing the web server HB140 CPU SC 312 5BE23 en 18 45 60 ...

Page 61: ...Data Output data Offset Width Value dec Value hex New Value hex 0 1 0 00 00 1 1 0 00 00 VIPA System 300S Deployment CPU 312 5BE23 Accessing the web server HB140 CPU SC 312 5BE23 en 18 45 61 ...

Page 62: ...due to an error This indicates the start up n STOP LED off When the CPU has completed the START UP OB it assumes the operating mode RUN n The application program in OB 1 is processed in a cycle Under the control of alarms other program sections can be included in the cycle n All timers and counters being started by the program are active and the process image is updated with every cycle n The BASP...

Page 63: ...ram until the next breakpoint via Debug è Resume 7 Delete all breakpoints with the option Debug è Delete All Breakpoints n The RUN LED blinks and the STOP LED is on n The execution of the code is stopped No level is further executed n All times are frozen n The real time clock runs is just running n The outputs were disabled BASP is activated n Configured CP connections remain exist The usage of b...

Page 64: ... 20mA issue 4mA If configured also substitute values may be issued decentral outputs Same behavior as the central digital analog outputs decentral inputs The inputs are cyclically be read by the decentralized station and the recent values are put at disposal STOP RUN res PowerON general First the PII is deleted then OB 100 is called After the execution of the OB the BASP is reset and the cycle sta...

Page 65: ...nnected to your CPU 1 For an overall reset the CPU must be switched to STOP state You may place the CPU in STOP by the menu command PLC è Operating mode 2 You may request the overall reset by means of the menu command PLC è Clean Reset ð A dialog window opens Here you can bring your CPU in STOP state if not already done and start the overall reset During the overall reset procedure the ST LED blin...

Page 66: ...o be extremely careful Under certain circumstances you may destroy the CPU for example if the voltage supply is interrupted during transfer or if the firmware file is defective In this case please call the VIPA Hotline Please regard that the version of the update firmware has to be dif ferent from the existing firmware otherwise no update is executed The CPU has an integrated website that monitors...

Page 67: ... è Firmware n Navigate via System 300S è CPU to your CPU and download the zip file to your PC n Extract the zip file and copy the extracted pkg files to your memory card CAUTION With a firmware update an overall reset is automatically executed If your program is only available in the load memory of the CPU it is deleted Save your program before executing a firmware update After the firm ware updat...

Page 68: ...ess the LEDs SF and FC are alternately blinking and the MC LED is on This may last several minutes 6 The update is successful finished when the LEDs PW ST SF FC and MC are on If they are blinking fast an error occurred 7 Turn power OFF and ON ð Now it is checked by the CPU whether further firmware updates are to be exe cuted If so again the LEDs SF and FC flash after a short start up period Con ti...

Page 69: ...nd blinking Start here to count the static light of the ST LED 3 After the 6 Static light release the operating mode switch and tip it downwards to MR ð For the confirmation of the resetting procedure the green RN LED lights up once This means that the RAM was deleted completely If the ST LED is on only an overall reset has been performed and the reset to factory setting has been failed In this ca...

Page 70: ...vely an overall reset the CPU checks if there is a memory card plugged with data valid for the CPU n Push the memory card into the slot until it snaps in leaded by a spring mechanism This ensures contacting By sliding down the sliding mechanism a just installed memory card can be protected against drop out To remove slide the sliding mechanism up again and push the storage media against the spring...

Page 71: ...ration The activation code is fixed to the MCC by means of an unique serial number Here the functionality as an external memory card is not affected To the following times an access takes place on a storage medium After overall reset n The CPU checks if a MCC is plugged If so the according additional memory is unlocked n The CPU checks whether a project S7PROG WLD exists If so it is automatically ...

Page 72: ... from the project to the file window of protect wld 4 Transfer the file protect wld to a memory card 5 Plug the memory card into the CPU and execute an overall reset Ä Chap 5 12 Overall reset page 65 ð The overall reset stores the blocks in protect wld permanently in the CPU pro tected from accesses of 3 persons Protected blocks are overwritten by a new protect wld Using a PG 3 persons may access ...

Page 73: ... from MMC is executed The wld file located after the command is loaded else s7prog wld is loaded 0xE805 SAVE_PROJECT The recent project blocks and hardware configuration is stored as s7prog wld at the memory card If the file just exists it is renamed to s7prog old If your CPU is password protected so you have to add this as parameter Otherwise there is no project written Example SAVE_PROJECT passw...

Page 74: ...END Marks the end of the command sequence 0xE802 arbitrary text Text after the command CMD_END is not evaluated The parameters IP address subnet mask and gateway may be received from the system administrator Enter the IP address if there is no gateway used 5 18 Diagnostic entries Ä Appendix A System specific event IDs page 168 n You may read the diagnostics buffer of the CPU via the Siemens SIMATI...

Page 75: ...means of jump commands or by timer and process related interrupts n At the breakpoint the CPU stops collecting data for the status display and instead of the required data it only provides the PG with data containing the value 0 n The interruption of the processing of statuses does not change the execution of the program It only shows that the data displayed is no longer valid When using the test ...

Page 76: ... operands is modified independently of the operating mode of the CPU When the operating mode is RUN the program is executed with the modified process variable When the program continues they may however be modified again without notification n Forcing variables You can pre set individual variables of a user program with fixed values so that they can not be changed or overwritten by the user progra...

Page 77: ...al functions and standard I Os may be used simultaneously with appropriate hardware Read access to inputs used by technological functions is pos sible Write access to used outputs is not possible Up to 2 channels may be parameterized as technological function The parameterization of the appropriate channel is made in the hardware configurator by the count submodule of the CPU 312C There are the fo...

Page 78: ...tal Input 16xDC 24V with interrupt capability n Digital Output 8xDC 24V 0 5A n Technological functions 2 channels CAUTION Please regard that the voltage at an output channel is always the supply voltage connected to L Overview VIPA System 300S Deployment I O periphery In Output area CPU 312 5BE23 HB140 CPU SC 312 5BE23 en 18 45 78 ...

Page 79: ... I 0 3 Channel 1 A Pulse 6 I 0 4 Channel 1 B Direction 7 I 0 5 Channel 1 HW gate 8 I 0 6 9 I 0 7 10 not used 11 not used 12 I 1 0 13 I 1 1 14 I 1 2 15 I 1 3 16 I 1 4 Channel 0 Latch 17 I 1 5 Channel 1 Latch 18 I 1 6 19 I 1 7 20 Ground 1M DI VIPA System 300S Deployment I O periphery In Output area CPU 312 5BE23 HB140 CPU SC 312 5BE23 en 18 45 79 ...

Page 80: ...put is recognized and the according LED is activated Pin assignment X11 DO Pin Assignment 21 2L Power supply DC 24V 22 O 0 0 Channel 0 Output 23 O 0 1 Channel 1 Output 24 Q 0 2 25 Q 0 3 26 Q 0 4 27 Q 0 5 28 Q 0 6 29 Q 0 7 30 Ground 2M DO 31 40 not used VIPA System 300S Deployment I O periphery In Output area CPU 312 5BE23 HB140 CPU SC 312 5BE23 en 18 45 80 ...

Page 81: ...put I 0 0 I 0 7 125 Byte Digital Input I 1 0 I 1 7 Counter 768 DInt Channel 0 Count value Frequency value 772 DInt Channel 1 Count value Frequency value 776 DInt reserved 780 DInt reserved Sub module Default address Access Assignment DI10 DO6 124 Byte Digital Output Q 0 0 Q 0 7 Counter 768 DWort reserved 772 DWort reserved 776 DWort reserved 780 DWort reserved Input range Output range VIPA System ...

Page 82: ...I 1 1 Pin assignment X11 DI Pin Assignment 1 1L Power supply DC 24V 2 I 0 0 Channel 0 A Pulse 3 I 0 1 Channel 0 B Direction 4 I 0 2 Channel 0 HW gate 5 I 0 3 Channel 1 A Pulse 6 I 0 4 Channel 1 B Direction 7 I 0 5 Channel 1 HW gate 8 I 0 6 9 I 0 7 10 not used 11 not used 12 I 1 0 13 I 1 1 14 I 1 2 15 I 1 3 16 I 1 4 Channel 0 Latch 17 I 1 5 Channel 1 Latch 18 I 1 6 19 I 1 7 20 Ground 1M DI 312 5BE2...

Page 83: ...t the input is recognized and the according LED is activated Pin assignment X11 DO Pin Assignment 21 2L Power supply DC 24V 22 O 0 0 Channel 0 Output 23 O 0 1 Channel 1 Output 24 Q 0 2 25 Q 0 3 26 Q 0 4 27 Q 0 5 28 Q 0 6 29 Q 0 7 30 Ground 2M DO 31 40 not used VIPA System 300S Deployment I O periphery Digital part HB140 CPU SC 312 5BE23 en 18 45 83 ...

Page 84: ...4 1 1 Address assignment Sub module Default address Access Assignment DI10 DO6 124 Byte Digital Input I 0 0 I 0 7 125 Byte Digital Input I 1 0 I 1 7 Counter 768 DInt Channel 0 Count value Frequency value 772 DInt Channel 1 Count value Frequency value 776 DInt reserved 780 DInt reserved Sub module Default address Access Assignment DI10 DO6 124 Byte Digital Output Q 0 0 Q 0 7 Counter 768 DWort reser...

Page 85: ...eters for the digital output channels 6 5 Counter 6 5 1 Counter Fast introduction The CPU 312 5BE23 has in outputs which may be used for technological functions respectively as standard periphery Technological functions and standard I O may be used simultaneously with appropriate hardware Read access to inputs used by techno logical functions is possible Write access to used outputs is not possibl...

Page 86: ... COUNT SFB 47 should cyclically be called e g OB 1 for controlling the counter functions The SFB is to be called with the corresponding instance DB Here the parameters of the SFB are stored Among others the SFB 47 contains a request inter face Hereby you get read and write access to the registers of the appropriate counter So that a new job may be executed the previous job must have be finished wi...

Page 87: ...ge of the HW gate may be parameterized n Latchx With an edge 0 1 at Latchx the recent counter value is stored in a memory that you may read at need Every counter has an assigned output channel The following behavior for the output channel may be set via parameterization n No comparison Output is not controlled and is switched in the same way as a normal output n Count value comparison value Output...

Page 88: ...ount n None End value Start value End value with up count as default Start value with down count as default 2 2147483647 231 1 2147483647 231 1 Gate function n Cancel count The count starts when the gate opens and resumes at the load value when the gate opens again n Stop count The count is interrupted when the gate closes and resumed at the last actual value when the gate opens again n Abort the ...

Page 89: ...ernal multiplied with 1 024ms 0 to 510 0 Hardware interrupt Hardware gate opening In the activated state a hardware interrupt is generated when the hardware gate opens while the software gate is open n activated n deactivated Hardware interrupt Hardware gate closing In the activated state a hardware interrupt is generated when the hardware gate closes while the software gate is open n activated n ...

Page 90: ...gital Output SET_DO BOOL 4 2 FALSE Parameter is not evaluated JOB_REQ BOOL 4 3 FALSE Initiates the job edge 0 1 JOB_ID WORD 6 0 0 Job ID JOB_VAL DINT 8 0 0 Value for write jobs STS_GATE BOOL 12 0 FALSE Status of the internal gate STS_STRT BOOL 12 1 FALSE Status of the hardware gate STS_LTCH BOOL 12 2 FALSE Status of the latch input STS_DO BOOL 12 3 FALSE Status of the output STS_C_DN BOOL 12 4 FAL...

Page 91: ...s start counting JOB_OVAL DINT 28 0 Output value for read request RES10 BOOL 32 0 FALSE reserved RES11 BOOL 32 1 FALSE reserved RES_STS BOOL 32 2 FALSE Reset status bits Resets the status bits STS_CMP STS_OFLW STS_ZP The SFB must be twice called to reset the status bit Reset with RES_STS Per channel you may call the SFB in each case with the same instance DB since the data necessary for the intern...

Page 92: ...ansition 2 Call the SFB The job is processed immediately JOB_DONE only applies to SFB run with the result FALSE JOB_ERR TRUE if an error occurred Details on the error cause are indicated at JOB_STAT Name Data type Address DB Default Comment JOB_DONE BOOL 22 0 TRUE New job can be started JOB_ERR BOOL 22 1 FALSE Job error JOB_STAT WORD 24 0 0000h Job error ID 0000h No error 0121h Comparison value to...

Page 93: ...2147483648 231 2147483647 231 1 Writing hysteresis 0 255 Writing pulse duration 0 510ms Single periodic count main count direction up Job Valid range End value 2 2147483646 231 1 Writing counter directly 2147483648 231 end value 2 Writing the load value 2147483648 231 end value 2 Writing comparison value 2147483648 231 end value 1 Writing hysteresis 0 255 Writing pulse duration 0 510ms Single peri...

Page 94: ...e is chosen the complete counting range is available Limits Valid value range Lower count limit 2 147 483 648 231 Upper count limit 2 147 483 647 231 1 Main counting direction forward Upper restriction of the count range The counter counts 0 res load value in positive direction until the parameterized end value 1 and jumps then back to the load value with the next following encoder pulse Main coun...

Page 95: ...ocess interrupt is triggered No main counting direction n The counter counts once starting with the load value n You may count forward or backwards n The count limits are set to the maximum count range n At over or underflow at the count limits the counter jumps to the according other count limit and the internal gate is automatically closed and the status bits STS_OFLW respectively STS_UFLW are s...

Page 96: ... the next positive count pulse and the gate is automatically closed n To restart the count process you must create a positive edge of the gate The counter starts with the load value Limits Valid value range Limit value 2 147 483 647 231 1 to 2 147 483 647 231 1 Lower count limit 2 147 483 648 231 VIPA System 300S Deployment I O periphery Counter Counter Functions HB140 CPU SC 312 5BE23 en 18 45 96...

Page 97: ...ter starts with the load value Limits Valid value range Limit value 2 147 483 648 231 to 2 147 483 646 231 2 Upper count limit 2 147 483 647 231 1 No main counting direction n The counter counts forward or backwards starting with the load value n At over or underrun at the count limits the counter jumps to the according other count limit and counts from there on n The count limits are set to the m...

Page 98: ...ositive count pulse Limits Valid value range Limit value 2 147 483 647 231 1 to 2 147 483 647 231 1 Lower count limit 2 147 483 648 231 Main counting direction backwards n The counter counts backwards starting with the load value n When the counter reaches the end value 1 in negative direction it jumps to the load value at the next negative count pulse n You may exceed the upper count limit VIPA S...

Page 99: ...ue in the latch register n Comparison You may set a comparison value that activates res de activates a digital output res releases a hardware interrupt depending on the counter value n Hysteresis The setting of a hysteresis avoids for example a high output toggling when the value of an encoder signal shifts around a comparison value The illustration shows how the additional functions influence the...

Page 100: ...0 at hardware gatex input of the module SW gate open activate In application program by setting SW_GATE of the SFB 47 close deactivate In application program by resetting SW_GATE of the SFB 47 The parameterization defines if the gate cancels or stops the counter process n At cancel function the counter starts counting with the load value after gate restart Gate function Gate function cancel and st...

Page 101: ... function The usage of the HW gate may be determined by the parameter Hardware gate Gate control via SW gate canceling HW gate deactivated gate function Cancel count SW gate HW gate Reaction Counter edge 0 1 deactivated Restart with load value Gate control abort inter ruption VIPA System 300S Deployment I O periphery Counter Counter Additional functions HB140 CPU SC 312 5BE23 en 18 45 101 ...

Page 102: ...dge 0 1 after edge 0 1 at HW gate edge 0 1 1 As soon as during a count process an edge 0 1 is recognized at the Latch input of a counter the recent counter value is stored in the according latch register The latch value may be accessed by the parameter LATCHVAL of the SFB 47 A just in LATCHVAL loaded value remains after a STOP RUN transition In the CPU a comparison value may be stored that is assi...

Page 103: ...n condition is no longer fulfilled With pulse time 0 the output is as set as the comparison condition is fulfilled Pulse duration For adaptation to the used actors a pulse duration may be specified The pulse dura tion defines how long the output should be set It may be preset in steps of 2ms between 0 and 510ms The pulse duration starts with the setting of the according dig ital output The inaccur...

Page 104: ...rison value With reaching the comparison condition the hysteresis gets active At active hysteresis the comparison result remains unchanged until the counter value leaves the set hyste resis range After leaving the hysteresis range a new hysteresis is only activated with again reaching the comparison conditions 1 Counter value comparison value output is set and hysteresis activated 2 Leave hysteres...

Page 105: ...erized pulse duration is put out the hysteresis is activated and the counting direction stored 4 Leaving the hysteresis range without changing counting direction hysteresis is de activated 5 Counter value comparison value pulse of the parameterized pulse duration is put out the hysteresis is activated and the counting direction stored 6 Counter value comparison value and hysteresis active no pulse...

Page 106: ...riod of the measured frequency exceeds the assigned integration time this means there was no rising edge during the measurement a value of 0 is returned The calculated frequency value is supplied in mHz units You can read out this value with the SFB parameter MEAS_VAL The number of activated channels does not influence the max frequency which is defined in the technical data 1 Integration time 2 C...

Page 107: ...1 A Pulse 6 I 0 4 Channel 1 B Direction 7 I 0 5 Channel 1 HW gate 8 I 0 6 9 I 0 7 10 not used 11 not used 12 I 1 0 13 I 1 1 14 I 1 2 15 I 1 3 16 I 1 4 Channel 0 Latch 17 I 1 5 Channel 1 Latch 18 I 1 6 19 I 1 7 20 Ground 1M DI VIPA System 300S Deployment I O periphery Frequency measurement Inputs for the frequency measurement HB140 CPU SC 312 5BE23 en 18 45 107 ...

Page 108: ...onding channel a dialog window for the frequency measurement is created and displayed and filled with default parameters 6 Execute the wished parameterization 7 Store the project with Station è Save and compile 8 Transfer the project to the CPU In the following the parameters are listed which may be used for frequency measurement configuration during hardware configuration Parameters which are not...

Page 109: ...arameters of the SFB are stored n Among others the SFB 48 contains a request interface Hereby you get read and write access to the registers of the frequency meter n So that a new job may be executed the previous job must have be finished with JOB_DONE TRUE n Per channel you may call the SFB in each case with the same instance DB since the data necessary for the internal operational are stored her...

Page 110: ...est interface of the SFB 48 may be used So that a new job may be executed the previous job must have be finished with JOB_DONE TRUE The deployment of the request interface takes place at the following sequence Edit the following input parameters Name Data type Address DB Default Comment JOB_REQ BOOL 4 3 FALSE Initiates the job edges 0 1 JOB_ID WORD 6 0 0 Job ID 00h Job without function 04h Writes ...

Page 111: ...NEL number greater than the maximum channel number of the CPU Parameter error 8001h is reported The frequency meter is controlled by the internal gate I gate The I gate is identical to the software gate SW gate SW gate open activate In the user program by setting SW_GATE of SFB 48 close deactivate In the user program by resetting SW_GATE of SFB 48 6 7 Pulse width modulation PWM 6 7 1 Overview With...

Page 112: ...annel 1 Pin 23 Connect the common ground to pin 30 Pin assignment X11 DO Pin Assignment 21 2L Power supply DC 24V 22 O 0 0 Channel 0 Output 23 O 0 1 Channel 1 Output 24 Q 0 2 25 Q 0 3 26 Q 0 4 27 Q 0 5 28 Q 0 6 29 Q 0 7 30 Ground 2M DO 31 40 not used PWM Outputs VIPA System 300S Deployment I O periphery Pulse width modulation PWM Overview HB140 CPU SC 312 5BE23 en 18 45 112 ...

Page 113: ... dialog window for the pulse width modulation is created and displayed and filled with default parameters 6 Execute the wished parameterization 7 Save the project with Station è Save and compile 8 Transfer the project to the CPU 6 7 2 1 Parameter overview In the following the parameters are listed which may be used for pulse width modulation configuration during hardware configuration Parameters w...

Page 114: ...0 x Period duration S7 analog value 0 27648 Output value 27648 x Period duration Time base n Set the time base which is valid for resolution and the range of values of period dura tion minimum pulse duration and on delay n If you have checked the 1ms button times with a resolution of 1ms can be set n If you have checked the 0 1ms button times with a resolution of 0 1ms can be set n Default 0 1 ms ...

Page 115: ...ed with the corresponding instance DB e g in OB 1 n You have read and write access to the corresponding registers via the SFB 49 job interface n Per channel you may call the SFB in each case with the same instance DB Write accesses to outputs of the instance DB is not permissible n So that a new job may be executed the previous job must have be finished with JOB_DONE TRUE n The switching between t...

Page 116: ...cuted A new job can be started JOB_ERR OUTPUT BOOL 16 4 FALSE Status parameter n 0 no error n 1 Error see JOB_STAT JOB_STAT OUTPUT WORD 18 0 0 Ä Return value JOB_STAT page 122 The output format for PWM and pulse train can be set via the hardware configuration Depending on the output format there are the following range of values for the output value n Output in Range of values 0 1000 Pulse duratio...

Page 117: ... 02h 1µs 03h 10µs n 0Ch 2 Attach pulse train job to the 1 pulse train job With this job number the duty factor for the 2 pulse train job is additionally to be specified via OUTP_VAL n 81h Read period duration of PWM and 1 pulse train job n 82h Read on delay n 84h Read minimum pulse duration n 88h Read number of pulses of the 1 pulse train job n 89h Read number of pulses of the 2 pulse train job n ...

Page 118: ... train job The request interface is used according to the following sequence 1 Call the SFB 49 n SW_EN FALSE n JOB_VAL Enter a value for the period duration here n JOB_ID 01h Write period duration for PWM output n JOB_REQ TRUE edge 0 1 ð n FromJOB_VAL the period duration is transmitted to the PWM output n JOB_DONE is FALSE during the SFB run n On error JOB_ERR TRUE and the cause of the error is re...

Page 119: ...JOB_DONE returns TRUE you can change the PWM parameters by repeating the steps 1 to 5 If values are changed during PWM output the new values are only output with the beginning of a new period A started period is always finished 10 By resetting of SW_EN SW_EN FALSE the output is immediately stopped 11 With reading jobs you can find the values to be read in the parameter JOB_OVAL in the instance DB ...

Page 120: ...ion here n JOB_ID 0Ah Write period duration for the 2 pulse train job n JOB_REQ TRUE edge 0 1 ð n From JOB_VAL the period duration for the 2 pulse train job is transferred n JOB_DONE is FALSE during the SFB run n On error JOB_ERR TRUE and the cause of the error is returned in JOB_STAT 8 To reset JOB_REQ call SFB 49 again with the same parameters and JOB_REQ FALSE 9 Call the SFB 49 n SW_EN TRUE edg...

Page 121: ... 2 pulse train job n JOB_REQ TRUE edge 0 1 ð n From JOB_VAL the period duration for the 2 pulse train job is transferred n JOB_DONE is FALSE during the SFB run n On error JOB_ERR TRUE and the cause of the error is returned in JOB_STAT 4 To reset JOB_REQ call SFB 49 again with the same parameters and JOB_REQ FALSE 5 Call the SFB 49 n SW_EN TRUE edge 0 1 n JOB_ID 0Ch Attach 2 pulse train job to the ...

Page 122: ... able number of channels of the CPU 8009h Channel no not valid You will get the return value channel no not valid 8009h if you have transmitted a channel number with CHANNEL which is bigger than 3 6 8 Diagnostic and interrupt The parameterization allows you to define the following trigger for a hardware interrupt that may initialize a diagnostic interrupt Counter function n Edge at a digital input...

Page 123: ... 8 n Bit 0 Edge at I 0 0 n Bit 1 Edge at I 0 1 n Bit 2 Edge at I 0 2 n Bit 3 Edge at I 0 3 n Bit 4 Edge at I 0 4 n Bit 5 Edge at I 0 5 n Bit 6 Edge at I 0 6 n Bit 7 Edge at I 0 7 9 n Bit 0 Edge at I 1 0 n Bit 1 Edge at I 1 1 n Bit 7 2 reserved 10 n Bit 0 Gate counter 0 open activated n Bit 1 Gate counter 0 closed n Bit 2 Over underflow end value counter 0 n Bit 3 Counter 0 reached comparison value...

Page 124: ...t execution in OB 40 and branches in OB 82 to diagnostic interrupt processingincoming If during the diagnostic interrupt pro cessing other events are occurring at other channels that may also cause a process res diagnostic interrupt these are interim stored After the end of the diagnostic interrupt pro cessing at first all interim stored diagnostic interrupts are processed in the sequence of their...

Page 125: ...agnostic interrupt is not longer pos sible The record sets of the diagnostic range have the following structure Byte Bit 7 0 0 n Bit 0 set at module failure n Bit 1 0 fix n Bit 2 set at external error n Bit 3 set at channel error n Bit 7 4 0 fix 1 n Bit 3 0 Module class 0101b Analog 1111b Digital n Bit 4 Channel information present n Bit 7 5 0 fix 2 n Bit 7 0 0 fix 3 n Bit 5 0 0 fix n Bit 6 Proces...

Page 126: ... Byte Bit 7 0 0 3 Content record set 0 Ä Record set 0 Diagnosticincoming page 125 4 n Bit 6 0 Channel type here 70h 70h Digital input 71h Analog input 72h Digital output 73h Analog output 74h Analog input output n Bit 7 More channel types present 0 no 1 yes 5 Number of diagnostic bits per channel here 08h 6 Number of channels of a module here 08h 7 n Bit 0 Error in channel group 0 I 0 0 I 0 3 n Bi...

Page 127: ... 3 0 fix n Bit 7 4 reserved 11 n Bit 7 0 reserved 12 Diagnostic interrupt due to process interrupt lost at n Bit 0 gate counter 0 closed n Bit 1 0 fix n Bit 2 gate counter 0 opened n Bit 3 0 fix n Bit 4 over underflow end value counter 0 n Bit 5 0 fix n Bit 6 counter 0 reached comparison value n Bit 7 0 fix 13 Diagnostic interrupt due to process interrupt lost at n Bit 0 gate counter 1 closed n Bi...

Page 128: ...Bit 3 reserved n Bit 4 Error in channel group 4 Frequency meter 0 n Bit 5 Error in channel group 5 Frequency meter 1 n Bit 6 reserved n Bit 7 reserved 8 Diagnostic interrupt due to process interrupt lost at n Bit 0 input I 0 0 n Bit 1 0 fix n Bit 2 input I 0 1 n Bit 3 0 fix n Bit 4 input I 0 2 n Bit 5 0 fix n Bit 6 input I 0 3 n Bit 7 0 fix 9 Diagnostic interrupt due to process interrupt lost at n...

Page 129: ...6 0 Channel type here 70h 70h Digital input 71h Analog input 72h Digital output 73h Analog output 74h Analog input output n Bit 7 More channel types present 0 no 1 yes 5 Number of diagnostic bits per channel here 08h 6 Number of channels of a module here 08h 7 n Bit 0 Error in channel group 0 I 0 0 I 0 3 n Bit 1 Error in channel group 1 I 0 4 I 0 7 n Bit 2 Error in channel group 2 I 1 0 I 1 1 n Bi...

Page 130: ...ut I 0 6 n Bit 5 0 fix n Bit 6 input I 0 7 n Bit 7 0 fix 10 Diagnostic interrupt due to process interrupt lost at n Bit 0 input I 1 0 n Bit 1 0 fix n Bit 2 input I 1 1 n Bit 3 0 fix n Bit 7 4 reserved 11 15 n Bit 7 0 reserved VIPA System 300S Deployment I O periphery Diagnostic and interrupt Diagnostic interrupt HB140 CPU SC 312 5BE23 en 18 45 130 ...

Page 131: ... 218 SER_RCV The repeated call of the FC SFC 217 SER_SND delivers a return value for 3964R USS and Modbus via RetVal that con tains among other things recent information about the acknowledgement of the partner station The protocols USS and Modbus allow to evaluate the receipt telegram by calling the FC SFC 218 SER_RCV after SER_SND The FCs SFCs are included in the consign ment of the CPU The foll...

Page 132: ...PU n If the data is transferred via a protocol the embedding of the data to the according protocol happens automatically n In opposite to ASCII and STX ETX the protocols 3964R USS and Modbus require the acknowledgement of the partner n An additional call of the FC SFC 217 SER_SND causes a return value in RetVal that includes among others recent information about the acknowledgement of the partner ...

Page 133: ... a twisted pair cable n Serial bus connection in two wire technology using half duplex mode n Data communications up to a max distance of 500m n Data communication rate up to 115 2kbaud 9pin SubD jack Pin RS485 1 n c 2 M24V 3 RxD TxD P Line B 4 RTS 5 M5V 6 P5V 7 P24V 8 RxD TxD N Line A 9 n c Overview Properties RS485 RS485 VIPA System 300S Deployment PtP communication Deployment of RS485 interface...

Page 134: ...7 5 1 FC SFC 217 SER_SND Send to PtP This block sends data via the serial interface The repeated call of the FC SFC 217 SER_SND delivers a return value for 3964R USS and Modbus via RETVAL that con tains among other things recent information about the acknowledgement of the partner station The protocols USS and Modbus require to evaluate the receipt telegram by calling the FC SFC 218 SER_RCV after ...

Page 135: ...ds for Start of Text and ETX for End of Text n Any data transferred from the periphery must be preceded by a Start followed by the data characters and the end character Depending of the byte width the following ASCII characters can be transferred 5bit not allowed 6bit 20 3Fh 7bit 20 7Fh 8bit 20 FFh n The effective data which includes all the characters between Start and End are trans ferred to the...

Page 136: ...on The DLE duplication is reversed in the receiving station The 3964R procedure requires that a lower priority is assigned to the communication partner When communication partners issue simulta neous send commands the station with the lower priority will delay its send command The USS protocol Universelle serielle Schnittstelle universal serial interface is a serial transfer protocol defined by Si...

Page 137: ...be directed to a certain slave ore be send to all slaves as broadcast mes sage For the identification of a broadcast message you have to set bit 5 to 1 in the ADR byte Here the slave addr bit 0 4 is ignored In opposite to a normal send command the broadcast does not require a telegram evaluation via FC SFC 218 SER_RCV Only write commands may be sent as broadcast n The Modbus protocol is a communic...

Page 138: ...te commands may be sent as broadcast Modbus offers 2 different transfer modes The mode selection happens during runtime by using the FC SFC 216 SER_CFG n ASCII mode Every byte is transferred in the 2 sign ASCII code The data are marked with a start and an end sign This causes a transparent but slow transfer n RTU mode Every byte is transferred as one character This enables a higher data pass throu...

Page 139: ... following assign ment is valid 0x Bit area for master output data Access via function code 01h 05h 0Fh 1x Bit area for master input data Access via function code 02h 3x word area for master input data Access via function code 04h 4x word area for master output data Access via function code 03h 06h 10h A description of the function codes follows below With the following Modbus function codes a Mod...

Page 140: ...re sent from master to slave up to their target are designated as output data OUT and contrary slave data received by the master were designated as input data IN If the slave announces an error the function code is send back with an ORed 80h Without an error the function code is sent back Slave answer Function code OR 80h Error Function code OK 1 word High byte Low byte The shown check sums CRC at...

Page 141: ...rd Respond telegram Slave address Function code Number of read bytes Data 1 word Data 2 word Check sum CRC LRC 1byte 1byte 1byte 1word 1word 1word max 125words Code 05h Write 1 bit to master output area 0x A status change is via Status bit with following values Status bit 0000h Bit 0 Status bit FF00h Bit 1 Command telegram Slave address Function code Address bit Status bit Check sum CRC LRC 1byte ...

Page 142: ... CRC LRC 1byte 1byte 1word 1word 1byte 1byte 1byte 1byte 1word max 250byte Respond telegram Slave address Function code Address 1 bit Number of bits Check sum CRC LRC 1byte 1byte 1word 1word 1word Code 10h Write n words to master output area 4x Command telegram Slave address Function code Address 1 word Number of words Number of bytes Data 1 word Data 2 word Check sum CRC LRC 1byte 1byte 1word 1wo...

Page 143: ... OB 1 Call SFC 217 SER_SND where the data is send with error evaluation Here you have to build up the telegram according to the Modbus rules Call SFC 218 SER_RECV where the data is received with error evaluation 3 Execute the project engineering of the slave The PLC user application at the slave has the following structure n OB 100 Call SFC 216 configuration as Modbus RTU slave with timeout settin...

Page 144: ...VIPA System 300S Deployment PtP communication Modbus Example communication HB140 CPU SC 312 5BE23 en 18 45 144 ...

Page 145: ...o version the CPUs 11x of the System 100V from VIPA may be configured To configure the SPEED7 CPUs a license for the profi version is necessary This may be online be received from VIPA and activated There are the following sources to get WinPLC7 n Online At www vipa com in the service area at Downloads a link to the current demo ver sion and the updates of WinPLC7 may be found n CD SW211C1DD WinPL...

Page 146: ...his at Activation code and click at OK ð Now WinPLC7 is activated as Profi version To find a station via Ethernet accessible nodes you have to install the WinPCAP driver This driver may be found on your PC in the installation directory at WinSPS S7 V5 WinPcap_ exe Execute this file and follow the instructions 8 3 Example project engineering 8 3 1 Job definition In the example a FC 1 is programmed ...

Page 147: ... project with Create a new solution 1 For the call of the hardware configurator it is necessary to set WinPLC7 from the Simulator Mode to the Offline Mode For this and the communication via Ethernet set Target TCP IP Direct 2 Double click to Hardware stations and here at Create new 3 Enter a station name Please consider that the name does not contain any spaces 4 After the load animation choose in...

Page 148: ...ont flap of the CPU 12 For the temporary setting of an IP address select you CPU and click to Temporary setting of the IP parameters Please enter the same IP parameters you configured in the CPU properties and click to Write Parameters 13 Confirm the message concerning the overall reset of the CPU ð The IP parameters are transferred to the CPU and the list of accessible stations is refreshed 14 Se...

Page 149: ...me value1 Press the Return key ð The cursor jumps to the column with the data type 2 The data type may either directly be entered or be selected from a list of available data types by pressing the Return key Set the data type to INT and press the Return key ð Now the cursor jumps to the Comment column 3 Here enter 1 compare value and press the Return key ð A new in à row is created and the cursor ...

Page 150: ...drag drop from the hardware catalog or by double click at them in the hardware catalog 3 Open in the catalog the category Comparator and add the operation CMP I to your network 4 Click to the input left above and insert value1 Since these are block parameters a selection list of block parameters may be viewed by entering 5 Type in and press the Return key 6 Choose the corresponding parameter of th...

Page 151: ...nished now Adding a new network For further comparisons the operations CMP I at Q 124 1 and CMP I at Q 124 2 are necessary Create a network for both operations with the following proceeding 1 Move your mouse at an arbitrary position on the editor window and press the right mouse key 2 Select at context menu è Insert new network ð A dialog field is opened to enter the position and number of the net...

Page 152: ...owing structure The FC 1 is to be called from the cycle OB 1 1 Go to OB 1 which was automatically created with starting the project 2 Go to Project content or to Solution and open the OB 1 by a double click 3 Change to the STL view Creating the block OB 1 VIPA System 300S WinPLC7 Example project engineering Project engineering HB140 CPU SC 312 5BE23 en 18 45 152 ...

Page 153: ... Load all blocks into the PLC 3 Switch the CPU to RUN by clicking at RUN in the CPU Control Center of Edit project ð The displayed state changes from STOP to RUN 4 To view the process image select View è Display process image window or click at ð The various areas are displayed 5 Double click to the process image and enter at Line 2 the address PQB 124 Con firm your input with OK A value marked by...

Page 154: ...lick to the output module open its properties dialog and enter the Module address 124 3 Switch the operating mode switch to RUN by means of the mouse ð Your program is executed and displayed in the simulator now 8 3 4 Transfer PLC program to CPU and its execution 1 For transfer to the CPU set the transfer mode to Target TCP IP Direct 2 If there are more network adapters in your PC the network adap...

Page 155: ...ll blocks 8 Switch your CPU to RUN state 9 Open the OB 1 by double click 10 Change the value of one variable save the OB 1 and transfer it to the CPU ð According to your settings the process image changes immediately The status of your blocks may be displayed with Block è Monitoring On Off VIPA System 300S WinPLC7 Example project engineering Transfer PLC program to CPU and its execution HB140 CPU ...

Page 156: ...gured and linked For diagnostics online tools are available Information about the Siemens TIA Portal can be found in the online help respectively in the according online documentation To start the Siemens TIA Portal with Windows select Start è Programs è Siemens Automation è TIA Then the TIA Portal opens with the last settings used With the menu Project è Exit in the Project view you may exit the ...

Page 157: ...to all constituent parts of your project The Project view is divided into the following areas 1 Menu bar with toolbars 2 Project tree with Details view 3 Project area 4 Device overview of the project respectively area for block programming 5 Properties dialog of a device parameter respectively information area 6 Hardware catalog and tools 7 Task Cards to select hardware catalog tasks and libraries...

Page 158: ...ct area Device overview Module Slot Type PLC 2 CPU 312C MPI interface 2 0 MPI interface DI10 DO6 2 X2 DI10 DO6 Counter 2 4 Counter Since the CPU 312 5BE23 from VIPA is configured as Siemens CPU 312C so the para metrization takes place via the Siemens CPU For parametrization click in the Project area respectively in the Device overview at the CPU part Then the parameters of the CPU part are shown i...

Page 159: ...ce over view Device overview Module Slot Type PLC 2 CPU 3 DI 4 DI DO 5 DO DIO 6 DIO AI 7 AI AO 8 AO For parametrization click in the Project area respectively in the Device overview on the module you want to parameterize The parameters of the module appear in the Proper ties dialog Here you can make your parameter settings Hardware configuration of the modules Parametrization VIPA System 300S Conf...

Page 160: ...with the following proceeding Determine the current Ethernet MAC address of your Ethernet PG OP channel This can be found as 1 address under the front flap of the CPU on a sticker on the left side You get valid IP address parameters from your system administrator The assignment of the IP address data happens online in the Siemens TIA Portal with the following pro ceeding 1 Start the Siemens TIA Po...

Page 161: ...igure in the Device configuration a Siemens CPU 312C 6ES7 312 5BE03 0AB0 V2 6 3 Configure the System 300 modules 4 For the Ethernet PG OP channel you have to configure a Siemens CP 343 1 6GK7 343 1EX11 0XE0 always as last module after the really plugged modules 5 Open the Property dialog by clicking on the CP 343 1EX11 and enter for the CP at Properties at Ethernet address the IP address data whic...

Page 162: ... Slot Type PLC 2 CPU 3 DI 4 DI DO 5 DO DIO 6 DIO AI 7 AI AO 8 AO CP 343 1 9 CP 343 1 VIPA System 300S Configuration with TIA Portal TIA Portal Hardware configuration Ethernet PG OP channel HB140 CPU SC 312 5BE23 en 18 45 162 ...

Page 163: ...n the file TIA_Vxx zip and copy all the files and folders in a work directory for the Siemens TIA Portal 1 Start the Siemens TIA Portal with your project 2 Switch to the Project view 3 Choose Libraries from the task cards on the right side 4 Click at Global libraries 5 Click at Open global libraries 6 Navigate to your directory and load the file TIA alxx 7 Copy the necessary blocks from the librar...

Page 164: ...ding Ethernet interface you have to assign IP address parame ters by means of the initialization Please consider to use the same IP address data in your project for the CP 343 1 1 For the transfer connect if not already done the appropriate Ethernet jack to your Ethernet 2 Open your project with the Siemens TIA Portal 3 Click in the Project tree at Online access and choose here by a double click y...

Page 165: ...r pro gram is not completely loaded and the SF LED gets on When a memory card has been installed the write command stores the content of the RAM as S7PROG WLD on the memory card The write command can be found in the Siemens TIA Portal in the Task card Online tools in the command area at Memory as button Copy RAM to ROM The MC LED blinks during the write access When the LED expires the write proces...

Page 166: ...Appendix VIPA System 300S Appendix HB140 CPU SC 312 5BE23 en 18 45 166 ...

Page 167: ...Content A System specific event IDs 168 B Integrated blocks 216 C SSL partial list 220 VIPA System 300S Appendix HB140 CPU SC 312 5BE23 en 18 45 167 ...

Page 168: ...nce of the sub module 12 Diagnostic interrupt outgoing 13 Cross traffic connection message 14 Neighbourhood change message 15 Synchronisation message bus 16 Synchronisation message device 17 Network component message 18 Clock synchronisation message bus 31 Pull interrupt component 32 Vendor specific interrupt min 33 Vendor specific interrupt topology change 127 Vendor specific interrupt max ZINFO3...

Page 169: ...2 Slot of the master ZINFO2 Page frame master 0xE016 Maximum block size exceeded in master transfer ZINFO1 Periphery address ZINFO2 Slot 0xE017 Error in access to integrated slave 0xE018 Error in mapping the master periphery 0xE019 Error on standard backplane bus system detection 0xE01A Error at detection of the operating mode 8 9 bit 0xE01B Error Maximum number of plug in components exceeded 0xE0...

Page 170: ...lock number in the telegram 13 Faulty block type in the telegram 14 Inactive function 15 Wrong size in the telegram 20 Error in writing on MMC 90 Faulty buffer size 98 Unknown error 99 Internal error 0xE0CD Error at DP V1 job management ZINFO1 Not user relevant ZINFO2 Not user relevant ZINFO3 Not user relevant DatID Not user relevant 0xE0CE Error Time out when sending i slave diagnostics 0xE100 Me...

Page 171: ...k type 56 OB 65 DB 66 SDB 67 FC 68 SFC 69 FB 70 SFB 97 VDB 98 VSDB 99 VFC 100 VSFC 101 VFB 102 VSFB 111 VOB ZINFO2 Block number ZINFO3 Block length 0xE21E Memory card reading Error in recharging after memory reset Protect wld file too large OB Not user relevant 0xE21F Memory card reading Error at reload after memory reset checksum error when reading OB Not user relevant PK Not user relevant ZINFO1...

Page 172: ... the activated FSC OB The inserted FSC is compatible with the CPU PK FSC source 0 CPU 1 Card ZINFO1 FSC CRC 1146 955 C000070 1736 955 C0NE040 2568 FSC C0ME040 3450 955 C000M30 3903 955 C000S30 4361 FSC C000M30 4940 FSC C000S30 5755 955 C0ME040 6843 FSC C0NE040 8561 FSC C000S20 9012 FSC C000M20 13895 955 C000060 15618 955 C000S20 16199 955 C000M20 17675 FSC C000S00 18254 FSC C000M00 20046 FSC C0000...

Page 173: ...58048 FSC C000020 63411 955 C000M60 65203 955 C000020 ZINFO2 FSC serial number high word ZINFO3 FSC serial number low word 0xE401 FSC card was removed OB Action after the end of the trial time 0 No action 1 CPU STOP 2 CPU STOP and FSC deactivated 3 Factory reset 255 FSC was not activated PK FSC source 0 CPU 1 Card ZINFO1 FSC CRC 1146 955 C000070 1736 955 C0NE040 2568 FSC C0ME040 3450 955 C000M30 3...

Page 174: ...0M40 38050 FSC C00MC10 41460 955 C000M50 41526 955 C0PE040 42655 FSC C00MC00 47852 955 C00MC00 48709 FSC C0PE040 50574 955 C000M70 52366 955 C000030 53501 FSC C000030 58048 FSC C000020 63411 955 C000M60 65203 955 C000020 ZINFO2 FSC serial number high word ZINFO3 FSC serial number low word DatID FeatureSet Trialtime in minutes 0xE402 A configured functionality is not activated The configuration is ...

Page 175: ...SC C000S30 5755 955 C0ME040 6843 FSC C0NE040 8561 FSC C000S20 9012 FSC C000M20 13895 955 C000060 15618 955 C000S20 16199 955 C000M20 17675 FSC C000S00 18254 FSC C000M00 20046 FSC C000040 21053 955 C000040 22904 955 C000S00 23357 955 C000M00 24576 955 C000050 35025 955 C00MC10 36351 FSC C000S40 36794 FSC C000M40 37260 955 C000S40 37833 955 C000M40 38050 FSC C00MC10 41460 955 C000M50 41526 955 C0PE0...

Page 176: ...red OB Action after the end of the trial time 0 No action 1 CPU STOP 2 CPU STOP and FSC deactivated 3 Factory reset 255 FSC was not activated PK FSC source 0 CPU 1 Card ZINFO1 FSC CRC 1146 955 C000070 1736 955 C0NE040 2568 FSC C0ME040 3450 955 C000M30 3903 955 C000S30 4361 FSC C000M30 4940 FSC C000S30 5755 955 C0ME040 6843 FSC C0NE040 8561 FSC C000S20 9012 FSC C000M20 13895 955 C000060 15618 955 C...

Page 177: ...0574 955 C000M70 52366 955 C000030 53501 FSC C000030 58048 FSC C000020 63411 955 C000M60 65203 955 C000020 ZINFO2 FSC serial number high word ZINFO3 FSC serial number low word DatID FeatureSet Trialtime in minutes 0xE406 The inserted feature set is corrupt PK FSC source 0 CPU 1 Card 0xE410 A CPU feature set was activated PK FSC source 0 CPU 1 Card ZINFO1 FSC CRC 1146 955 C000070 1736 955 C0NE040 2...

Page 178: ...C10 36351 FSC C000S40 36794 FSC C000M40 37260 955 C000S40 37833 955 C000M40 38050 FSC C00MC10 41460 955 C000M50 41526 955 C0PE040 42655 FSC C00MC00 47852 955 C00MC00 48709 FSC C0PE040 50574 955 C000M70 52366 955 C000030 53501 FSC C000030 58048 FSC C000020 63411 955 C000M60 65203 955 C000020 ZINFO2 FSC serial number high word ZINFO3 FSC serial number low word 0xE500 Memory management Deleted block ...

Page 179: ...FO1 Error code 1 Parser error SDB structure 2 Parser error SDB is not a valid SDB type ZINFO2 SDB type ZINFO3 SDB number 0xE502 Error in protect wld ZINFO2 Block type 56 OB 65 DB 66 SDB 67 FC 68 SFC 69 FB 70 SFB 97 VDB 98 VSDB 99 VFC 100 VSFC 101 VFB 102 VSFB 111 VOB ZINFO3 Block number VIPA System 300S System specific event IDs HB140 CPU SC 312 5BE23 en 18 45 179 ...

Page 180: ...for Ethernet PG OP channel ZINFO1 Periphery address ZINFO3 0 periphery address is input 1 periphery address is output 0xE605 Too many productive connections configured ZINFO1 Interface slot ZINFO2 Number of configured connections ZINFO3 Number of admissible connections 0xE610 On board PROFIBUS MPI Bus error removed PK Not user relevant ZINFO1 Interface ZINFO2 Not user relevant ZINFO3 Not user rele...

Page 181: ...user relevant DatID Master system ID 0xE721 Internal error Please contact the hotline ZINFO1 Not user relevant ZINFO2 Master system ID ZINFO3 Not user relevant DatID Not user relevant 0xE722 Internal error Please contact the hotline ZINFO1 Channel Event 0 Channel offline 1 Bus error 2 Internal error ZINFO2 Master system ID DatID Not user relevant 0xE723 Internal error Please contact the hotline ZI...

Page 182: ...nd executed 0xE808 Internal error Please contact the hotline ZINFO2 Not user relevant ZINFO3 Not user relevant 0xE809 Internal error Please contact the hotline ZINFO3 Not user relevant 0xE80A Internal error Please contact the hotline ZINFO3 Status 0 OK 65153 File create error 65185 File writing error 65186 Odd address for reading 0xE80B CMD auto command DIAGBUF recognized and executed ZINFO3 Statu...

Page 183: ... Internal message 0xE825 Internal message 0xE826 Internal message 0xE827 Internal message 0xE828 Internal message 0xE829 Internal message 0xE82A CMD auto command CPUTYPE_318 recognized and executed ZINFO3 Error code 0xE82B CMD auto command CPUTYPE_ORIGINAL recognized and executed ZINFO3 Error code 0xE82C CMD auto command WEBVISU_PGOP_ENABLE recognized and executed 0xE82D CMD auto command WEBVISU_P...

Page 184: ...ripheral area ZINFO1 Peripheral address ZINFO2 Slot ZINFO3 Data width 0xE920 Configuration error PROFINET ZINFO1 Position 0 Error code 0xE980 Error when loading the WebVisu project file 0xE981 Error in the configuration of the WebVisu project 0xE982 Internal error of the WebVisu server 0xE983 Hardware configuration of the control is not loaded WebVisu is not started 0xE984 WebVisu is blocked by th...

Page 185: ...on in operating condition RUN 1 STOP update 2 STOP memory reset 3 STOP auto initialization 4 STOP internal 5 STARTUP cold start 6 STARTUP restart warm start 7 STARTUP hot restart 9 RUN 10 HALT 11 COUPLING 12 UPDATING 13 DEFECTIVE 14 Error search mode 15 De energised 253 Process image release in STOP 254 Watchdog 255 Not set PK Not user relevant ZINFO1 Slot ZINFO2 Status 0 OK 1 Error 2 Empty 3 Busy...

Page 186: ...O2 Slot ZINFO3 Output data width of the plugged component 0xEA10 SBUS Input periphery address outside the periphery area ZINFO1 Periphery address ZINFO2 Slot ZINFO3 Data width 0xEA11 SBUS Output periphery address outside the periphery area ZINFO1 Periphery address ZINFO2 Slot ZINFO3 Data width 0xEA12 SBUS Error in writing dataset ZINFO1 Slot ZINFO2 Dataset number ZINFO3 Dataset length 0xEA14 SBUS ...

Page 187: ...on for X2 0xEA23 Error Configuration RS485 interface X3 Value is outside the limits ZINFO2 Configuration for X3 0xEA24 Error Configuration RS485 interface X2 X3 Interface protocol missing default settings are used ZINFO2 Configuration for X2 ZINFO3 Configuration for X3 0xEA30 Internal error Please contact the hotline ZINFO1 Status ZINFO2 Not user relevant ZINFO3 Not user relevant 0xEA40 Internal e...

Page 188: ...ler Too many configured PROFINET IO devices ZINFO1 Number of configured devices ZINFO2 Slot ZINFO3 Maximum possible number of devices 0xEA54 PROFINET IO controller Multiple configuration of a periphery address PK Not user relevant ZINFO1 Logical address of the IO system ZINFO2 Rack slot of the controller ZINFO3 Base address of the block which is too large DatID Not user relevant 0xEA55 PROFINET IO...

Page 189: ...oo many input bytes per device ZINFO1 Bit 5 Too many output bytes per device ZINFO1 Bit 6 Too many productive connections ZINFO1 Bit 7 Too many input bytes in the process image ZINFO1 Bit 8 Too many output bytes in the process image ZINFO1 Bit 9 Configuration not available ZINFO1 Bit 10 Configuration invalid ZINFO1 Bit 11 Refresh interval too small ZINFO1 Bit 12 Refresh interval too large ZINFO1 B...

Page 190: ... Service PK Rack slot ZINFO1 StackError Error Code ZINFO2 StackError Error Detail ZINFO3 Position 0 StackError Error AdditionalDetail ZINFO3 Position 8 StackError Error AreaCode DatID StackError DeviceRef 0xEA67 PROFINET IO controller Error reading dataset OB Rack slot of the controller PK Error type 0 Dataset error local 1 Dataset error stack 2 Dataset error station ZINFO1 Dataset number ZINFO2 D...

Page 191: ...iceError Detail ZINFO3 Position 0 ServiceError AdditionalDetail ZINFO3 Position 8 ServiceError AreaCode 0xEA6B PROFINET IO controller Incorrect Vendor ID OB Operating mode 0 Configuration in operating condition RUN 1 STOP update 2 STOP memory reset 3 STOP auto initialization 4 STOP internal 5 STARTUP cold start 6 STARTUP restart warm start 7 STARTUP hot restart 9 RUN 10 HALT 11 COUPLING 12 UPDATIN...

Page 192: ...ot restart 9 RUN 10 HALT 11 COUPLING 12 UPDATING 13 DEFECTIVE 14 Error search mode 15 De energised 253 Process image release in STOP 254 Watchdog 255 Not set PK Rack slot ZINFO1 Device ID 0xEA6D PROFINET IO controller No empty name OB Operating mode 0 Configuration in operating condition RUN 1 STOP update 2 STOP memory reset 3 STOP auto initialization 4 STOP internal 5 STARTUP cold start 6 STARTUP...

Page 193: ...ondition RUN 1 STOP update 2 STOP memory reset 3 STOP auto initialization 4 STOP internal 5 STARTUP cold start 6 STARTUP restart warm start 7 STARTUP hot restart 9 RUN 10 HALT 11 COUPLING 12 UPDATING 13 DEFECTIVE 14 Error search mode 15 De energised 253 Process image release in STOP 254 Watchdog 255 Not set PK Rack slot ZINFO1 Device ID ZINFO2 Not user relevant ZINFO3 Not user relevant DatID Not u...

Page 194: ...FO1 Device ID ZINFO2 Not user relevant ZINFO3 Not user relevant DatID Not user relevant 0xEA70 PROFINET IO controller PROFINET stack configuration error OB UnsupportedApiError api PK Rack slot ZINFO1 UnsupportedApiError slot ZINFO2 UnsupportedApiError subslot DatID UnsupportedApiError deviceID 0xEA71 Internal error Please contact the hotline PK Rack slot ZINFO1 functionIndex ZINFO2 Not user releva...

Page 195: ...PK Not user relevant ZINFO1 Filenamehash 0 3 ZINFO2 Filenamehash 4 7 ZINFO3 Line DatID SvnRevision 0xEA82 Internal error Please contact the hotline OB Not user relevant PK Not user relevant ZINFO1 Filenamehash 0 3 ZINFO2 Filenamehash 4 7 ZINFO3 Line DatID SvnRevision 0xEA83 Internal error Please contact the hotline OB Not user relevant PK Not user relevant ZINFO1 Filenamehash 0 3 ZINFO2 Filenameha...

Page 196: ...h 0 3 ZINFO2 Filenamehash 4 7 ZINFO3 Line DatID Current job number 0xEA93 Internal error Please contact the hotline OB Current OB number PK Core status 0 INIT 1 STOP 2 READY 3 PAUSE 4 RUN ZINFO1 Filenamehash 0 3 ZINFO2 Filenamehash 4 7 ZINFO3 Line DatID Current job number 0xEA97 Internal error Please contact the hotline ZINFO3 Slot 0xEA98 Error in file reading via SBUS PK Not user relevant ZINFO3 ...

Page 197: ...zation 4 STOP internal 5 STARTUP cold start 6 STARTUP restart warm start 7 STARTUP hot restart 9 RUN 10 HALT 11 COUPLING 12 UPDATING 13 DEFECTIVE 14 Error search mode 15 De energised 253 Process image release in STOP 254 Watchdog 255 Not set ZINFO1 Diagnostic address of the master ZINFO2 Not user relevant ZINFO3 Number of errors which occurred 0xEAB0 Invalid link mode OB Current operating mode 0 C...

Page 198: ...ode undefined 6 Auto Negotiation 0xEAC0 Internal error Please contact the hotline ZINFO1 Error code 2 Internal error 3 Internal error 4 Internal error 5 Internal error 6 Internal error 7 Internal error 8 Internal error 8 Internal error 0xEAD0 SyncUnit configuration error ZINFO1 Status 0xEB02 System SLIO error Preset configuration does not match actual configuration ZINFO1 Bit mask slots 1 16 ZINFO...

Page 199: ...ess image 0xEB10 System SLIO error Bus error PK Not user relevant ZINFO1 Error type 96 Bus enumeration error 128 General error 129 Queue execution error 130 Error interrupt ZINFO2 Error on bus enumeration error ZINFO1 DatID Not user relevant 0xEB11 System SLIO error Error during bus initialization PK Not user relevant DatID Not user relevant 0xEB20 System SLIO error Interrupt information undefined...

Page 200: ...ions is not supported 2 Master system ID invalid 3 Slot invalid 4 Master configuration invalid 5 Master type invalid 6 Slave diagnostic address invalid 7 Slave address invalid 8 Slave module IO configuration invalid 9 Logical address already in use 10 Internal error 11 IO mapping error 12 Error 13 Error in initialising the EtherCAT stack is entered by the CP 14 Slave station number already occupie...

Page 201: ...ce clock is not in Beckhoff Mode 3 The station address could not be determined for checking station address in ZINFO1 is accordingly 0 4 The slave information could not be determined for checking station address in ZINFO1 is accordingly 0 5 The EtherCAT status of the drive could not be determined 6 Error when sending the SDO request for further information the subsequent event with the ID 0xED60 i...

Page 202: ...n available DatID Input address DatID Output address 0xEC11 EtherCAT Recurrence bus with missing slaves ZINFO1 Position 0 New status 0 Undefined Unkown 1 Init 2 PreOp 3 Bootstrap 4 SafeOp 8 Op ZINFO1 Position 8 Previous status 0 Undefined Unkown 1 Init 2 PreOp 3 Bootstrap 4 SafeOp 8 Op ZINFO2 Diagnostic address of the master ZINFO3 Number of stations which are not in the same state as the master D...

Page 203: ...able DatID Station available DatID Input address DatID Output address 0xEC30 EtherCAT Topology OK ZINFO2 Diagnostic address of the master 0xEC40 Bus cycle time infringement resolved ZINFO2 Logical address of the IO system 0xEC50 EtherCAT Distributed clocks DC out of sync OB Operating mode 0 Configuration in operating condition RUN 1 STOP update 2 STOP memory reset 3 STOP auto initialization 4 STOP...

Page 204: ... Position 0 Station number ZINFO3 Position 11 IO system ID ZINFO3 Bit 15 System ID DP PN 0xED10 EtherCAT Breakdown bus ZINFO1 Position 0 New status 0 Undefined Unkown 1 Init 2 PreOp 3 Bootstrap 4 SafeOp 8 Op ZINFO1 Position 8 Previous status 0 Undefined Unkown 1 Init 2 PreOp 3 Bootstrap 4 SafeOp 8 Op ZINFO2 Diagnostic address of the master ZINFO3 Number of stations which are not in the same state ...

Page 205: ...ested status 19 Bootstrap not supported 20 No valid firmware 22 Invalid mailbox configuration 22 Invalid mailbox configuration 23 Invalid sync manager configuration 24 No valid inputs available 25 No valid outputs available 26 Synchronisation error 27 Sync manager watchdog 28 Invalid sync manager types 29 Invalid output configuration 30 Invalid input configuration 31 Invalid watchdog configuration...

Page 206: ...e Over EtherCAT 79 Error in acyclic data exchange Vendorspecific Over EtherCAT DatID Station not available DatID Station available DatID Input address DatID Output address 0xED20 EtherCAT Bus state change without calling OB86 ZINFO1 Position 0 New status 0 Undefined Unkown 1 Init 2 PreOp 3 Bootstrap 4 SafeOp 8 Op ZINFO1 Position 8 Previous status 0 Undefined Unkown 1 Init 2 PreOp 3 Bootstrap 4 Saf...

Page 207: ... Error code 4 Cancel master state change 8 Busy 11 Invalid parameters 14 Invalid status 16 Time out DatID Station available DatID Station not available DatID Output address DatID Input address 0xED22 EtherCAT Slave status change that does not generate an OB86 ZINFO1 Position 0 New status 0 Undefined Unkown 1 Init 2 PreOp 3 Bootstrap 4 SafeOp 8 Op ZINFO1 Position 8 Previous status 0 Undefined Unkow...

Page 208: ...atchdog configuration 32 Slave station needs cold start 33 Slave station needs to be in INIT state 34 Slave station needs to be in PreOp state 35 Slave station needs to be in SafeOp state 45 Invalid output FMMU configuration 46 Invalid input FMMU configuration 48 Invalid DC Sync configuration 49 Invalid DC Latch configuration 50 PLL error 51 Invalid DC IO error 52 Invalid DC time out error 66 Erro...

Page 209: ...RTUP cold start 6 STARTUP restart warm start 7 STARTUP hot restart 9 RUN 10 HALT 11 COUPLING 12 UPDATING 13 DEFECTIVE 14 Error search mode 15 De energised 253 Process image release in STOP 254 Watchdog 255 Not set ZINFO1 Master status 0 Undefined Unkown 1 Init 2 PreOp 3 Bootstrap 4 SafeOp 8 Op ZINFO2 EtherCAT configuration present 0 There is no EC configuration 1 There is an EC configuration ZINFO...

Page 210: ...STARTUP cold start 6 STARTUP restart warm start 7 STARTUP hot restart 9 RUN 10 HALT 11 COUPLING 12 UPDATING 13 DEFECTIVE 14 Error search mode 15 De energised 253 Process image release in STOP 254 Watchdog 255 Not set ZINFO2 Diagnostic address of the master ZINFO3 DC state change 0 Master 1 Slave 0xED60 EtherCAT Diagnostic buffer CP Slave status change OB Operating mode 0 Configuration in operating...

Page 211: ...valid requested status change 18 Unknown requested status 19 Bootstrap not supported 20 No valid firmware 22 Invalid mailbox configuration 22 Invalid mailbox configuration 23 Invalid sync manager configuration 24 No valid inputs available 25 No valid outputs available 26 Synchronisation error 27 Sync manager watchdog 28 Invalid sync manager types 29 Invalid output configuration 30 Invalid input co...

Page 212: ...nge Vendorspecific Over EtherCAT DatID Cause for slave status change 0 Regular slave status change 1 Slave failure 2 Recurrence slave 3 Slave is in an error state 4 Slave has unexpectedly changed its status 0xED61 EtherCAT Diagnostic buffer CP CoE emergency OB EtherCAT station address high byte PK EtherCAT station address low byte ZINFO1 Position 0 Error register ZINFO1 Position 8 MEF Byte1 ZINFO2...

Page 213: ... auto initialization 4 STOP internal 5 STARTUP cold start 6 STARTUP restart warm start 7 STARTUP hot restart 9 RUN 10 HALT 11 COUPLING 12 UPDATING 13 DEFECTIVE 14 Error search mode 15 De energised 253 Process image release in STOP 254 Watchdog 255 Not set ZINFO1 Diagnostic address of the master ZINFO2 EtherCAT station address 0xED80 Bus error occurred receive time out ZINFO1 Logical address of the...

Page 214: ... PK Not user relevant ZINFO3 Not user relevant DatID Not user relevant 0xF9C1 Restart of the component OB NCM_EVENT 1 OVS Component start up request was denied 3 Component data basis invalid 6 IP_CONFIG New IP address assigned by STEP7 configuration 10 IP_CONFIG A non configured new IP address was assigned 13 HW reset at P bus for CPU memory reset 19 Switch actuation from STOP to RUN causes the re...

Page 215: ...ent part of the component data base is deleted by the rack component after being loaded 70 Restore factory defaults same as memory reset of CPU 83 Network interface automatic configuration TP ITP with 10 Mbit s semi duplex 96 The MAC address was retrieved from the system SDB This is the configured address 97 The MAC address was retrieved from the boot EPROM This is the factory provided address 100...

Page 216: ... remove module OB 85 OBNL_FLT Priority class error OB 86 RACK_FLT Slave failure restart OB 100 COMPLETE RESTART Start up OB 121 PROG_ERR Programming error OB 122 MOD_ERR Periphery access error SFB Name Description SFB 0 CTU Up counter SFB 1 CTD Down counter SFB 2 CTUD Up down counter SFB 3 TP Create pulse SFB 4 TON On delay SFB 5 TOF Create turn off delay SFB 7 TIMEMESS Time measurement SFB 12 BSE...

Page 217: ... 4 READ_RTM Read run time meter SFC 5 GADR_LGC Logical address of a channel SFC 6 RD_SINFO Read start information SFC 7 DP_PRAL Triggering a hardware interrupt on the DP master SFC 12 D_ACT_DP Activating and deactivating of DP slaves SFC 13 DPNRM_DG Read diagnostic data of a DP salve SFC 14 DPRD_DAT Read consistent data SFC 15 DPWR_DAT Write consistent data SFC 17 ALARM_SQ ALARM_SQ SFC 18 ALARM_SQ...

Page 218: ...ess SFC 51 RDSYSST Read system status list SSL SFC 52 WR_USMSG Write user entry into diagnostic buffer SFC 53 µS_TICK Time measurement SFC 54 RD_DPARM Reading predefined parameters SFC 55 WR_PARM Write dynamic parameter SFC 56 WR_DPARM Write default parameter SFC 57 PARM_MOD Parametrize module SFC 58 WR_REC Write record set SFC 59 RD_REC Read record set SFC 64 TIME_TCK Read system time tick SFC 65...

Page 219: ...e attributes SFC 208 FILE_OPN Open file SFC 209 FILE_CRE Create file SFC 210 FILE_CLO Close file SFC 211 FILE_RD Read file SFC 212 FILE_WR Write file SFC 213 FILE_SEK Position pointer SFC 214 FILE_REN Rename file SFC 215 FILE_DEL Delete file SFC 216 SER_CFG Parametrization PtP SFC 217 SER_SND Send to PtP SFC 218 SER_RCV Receive from PtP SFC 219 CAN_TLGR CANopen communication SFC 227 TD_PRM Paramet...

Page 220: ...Status of the LEDs xy91h Status information CPU xy92h Stations status information DPM xy94h Stations status information DPM PROFINET IO and EtherCAT xy96h Module status information PROFIBUS DP PROFINET IO EtherCAT xyA0h Diagnostic buffer of the CPU xyB1h Module diagnostic information record set 0 xyB2h Module diagnostic information record set 1 via physical address xyB3h Module diagnostic informat...

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Summary of Contents for VIPA System 300S+

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YASKAWA VIPA System 300S+, Manual, Page: 90 / 220

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Summary of Contents for VIPA System 300S+

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