A
B
C
D
E
F
G
H
I
J
K
L
1
2
3
4
5
6
7
8
A
B
C
D
E
F
G
H
I
J
K
L
1
2
3
4
5
6
7
8
<P.1>
Tyros
Tyros
Tyros
■
Tyros BLOCK DIAGRAM 1/10
16MHz
HDREQ
16MHz
M_RA[0-10],
[12-13]
M_LRD[0-15]
M_HRD[0-15]
MAIN
64Mbit
FLASH
X2
64Mbit
SDRAM
X2
MAIN
64Mbit
SDRAM
X2
LCD
LCD
64Mbit
FLASH
or
MASK
PRG
STYLE
64Mbit
128Mbit
WAVE-H
X3
DSCS
PROGCS(CS0)
128Mbit
WAVE-L
X3
HMA[0-26]
HMD[0-15]
HMA[0-26]
HMD[0-15]
LMA[0-26]
LMD[0-15]
LMA[0-26]
LMD[0-15]
S_RA[0-10],
[12-13]
S_LRD[0-15]
S_HRD[0-15]
A[0-25]
D[0-31]
A[2-23]
D[0-15]
A[2-23]
D[16-31]
CKIO
RESET
A[2-23]
D[0-15]
A[2-23]
D[16-31]
A[1-22]
D[0-15]
A[1-21]
D[0-15]
SA[2-23]
A[0-25]
D[0-31]
A[0-1]
5D[0-7]
A[1-6]
D[0-15]
A[1-16]
D[0-15]
A[1-16]
D[0-15]
SD[0-15]
SA[2-23]
SD[16-31]
SA[1-22]
SD[0-15]
SA[1-23]
SD[0-15]
SA[0-21]
SD[0-15]
MA[0-9]
MD[0-15](6,15:PullUp)
SA[0-25]
SD[0-31]
+3.3D
+3.3D
+3.3D
+3.3D
+3.3D
+3.3D_SUB
+3.3D_SWP
+5D
SD[0-15]
+5D
D[0-15]
5D[0-15]
5SD[0-15]
A1
MWR
MCS
MRD
MI2CS
5SUBIC
5MIRQ
IRQMI2
5SIRQ
SIRQ
DIRECTION
SUBIC
RD/WR
A[1]
RD
SIRQ
LEVEL
CONV.
16MHz
10MHz
6MHz
11.2896MHz
LEVEL
CONV.
SPROGCS (CS0)
SRD/SWR
LCDCCS (CS2)
SSDRAMCS(CS3)
SMI2CS (CS4)
SDATACS (CS5)
SPROGCS
(CS0)
SSDRAMCS
(CS3)
LCDCCS(CS2)
SMI2CS
(CS4)
SDATACS
(CS5)
SRD/SWR
DIR
CKE
RESET
14.3181MHz 17.734475MHz
SRD
SWE
SRD
SWE
+VCC_INT2
+VCC_INT1
OE
SMICS2
MLCAS,MUCAS,MWE,MRAS
SRD
SWE
BS
SRD/SWR
LCDIC
LCDIC
CKIO(s)
CKIO(S)
LCDWAIT
SCAS,SRAS
MLU,MUU, MUL
SCKE
BS
MLU
LCDWAIT
SUBIC
WP2
DISPON,
CP,LOAD
FRM,
FPD[0-7]
VOUT
SUBIC
SRD
SWE
WP2
(flash)
SRD
SWE
WP2
(flash)
MLU,MUU
SRD/SWR
SWE,MUL
SCAS
SRAS
PROGCS (CS0)
SDRAMCS (CS3)
DSCS (CS4)
8-CS (CS5)
16-CS (CS6)
RD/WR
RD
WE0/DQMLL
WE1/DQMLU
DIC
DATACS
16-CS
USBCS
MI2CS
HDCS0
STYLECS
A25
A17
A20
A21
SWP1CS
WAVECS
SWP2CS
HDCS1
HDDMA
STYLECS
SDRAMCS
(CS3)
DATACS
USBCS
(ctrl*)
(ctrl*)
CKE
CKIO
DQMLU,
DQMUU
RAS3L
RD/WR
WE0/DQMLL
,DQMUL
DQMUL,DQMUU
CAS
CAS
RAS3L
WE1/DQMLU
RD
PROGWP
PROGWP
STYLEWP
WE1/DQMLU
(flash)
RD
STYLEWP
(flash)
WE1/DQMLU
RD
WE1/DQMLU
RD
IRQUSB
IRQSWP
IRQIF
IRQFD
IRQUSB
D+,D-,Vbus,TrON
SUBIC
WE1/DQMLU
CKIO
HD/FD
HD/FD
MDACK
MDACK
DRAK
DRAK
HARD DISK
IDE
(Option)
A[2-4]
D[0-15]
RD
WE1/DQMLU
DIC,SWPIC
5DIC
HDCS0
HRD
HWRL
HDA[2-4]
HDD[0-15]
HDCS1
HDDMA
TIMING
Gene.
HDCS0
HDCS1
HDACK
FDACK
FDREQ
MDREQ
MDREQ
IRQHD
IRQHD
WE1/DQMLU
RD
8-CS(CS5)
IRQFD
5DIC
3.3
to5
SWP1CS
SWP2CS
WE1/DQMLU
RD
WE1/DQMLU
RD
IRQMI2
WAVECS
SWPIC
SWPIC
ABUS[0-15],ADIR,ACLK,AFRM
64FS
256FS
SYO,FS2560
ESDA,ESCL,EIC (*EBUS )
IRQIF
WAIT
ADLR WCLK0
WCLK1
ADC_DA
TA
DAC_DA
TA
0
DAC_DA
TA
1
+5A +3.3A
+5A +3.3A
+5A
DACIC
W
AIT(M)
IRQSWP(M)
W
AIT(S)
IRQSWP(S)
WAIT(M)
IRQSWP(M)
WAIT(S)
IRQSWP(S)
OR
WAIT
IRQSWP
DACIC
64FS
256FS
ADLR
WCLK0
ADC_DATA
DAC_DATA0
DAC_DATA1
WCLK1
DACIC
64FS
256FS
DACIC
64FS
256FS
MUTE
MUTE
MUTE
*HCS[0,1]
,MOEN,MWEN
*HCS[0,1],
MOEN,MWEN
*LCS[0,1]
,MOEN,MWEN
*LCS[0,1],
MOEN,MWEN
LPF
I/V Conv.
BUFFER
MUTE
FOOT
CONTROLLER1
(SUSTAIN)
FOOT
CONTROLLER2
FOOT
CONTROLLER3
MIDI A
IN
MIDI A
OUT
MIDI B
IN
MIDI B
OUT
USB
VIDEO
OUT
MUTING
CIR.
RELAY
ANALOG
SWITCH
MUTING
CIR.
INSERT SW
MUTING
CIR.
MIDI
CIR.
MIDI
CIR.
MIDI A OUT
MIDI B OUT
VOUT
D+
D-
Vbus
TrON
FOOT VOL1
PEDAL IN1
FOOT VOL2
PEDAL IN2
FOOT VOL3
PEDAL IN3
+5D
+12A
-12A
-22V
(NC)
+5D
+12A
-12A
+5A
+3.3A
+3.3D_SUB
+3.3D
(+2.0V)
+3.3D_SUB5
FLOPPY DISK
DRIVE
16N KEYBOARD
with Pressure Control sensor
EBUS
EBUS
LCD DATA
+5D,+3.3D
+5L
WHEEL
ASSEMBLY
DRIVER
DRIVER
DRIVER
SW,LED
SW,LED
SW,LED
FOOTVOL1
PEDALIN1
FOOTVOL2
PEDALIN2
FOOTVOL3
PEDALIN3
MIDIAIN
MIDIAOUT
MIDIBOUT
MIDIBIN
SUB1IN
SUB2IN
SUB1IN
SUB2IN
MUTE
MUTE
MUTE
MUTE
MUTE
EXTERNAL
SPEAKER UNIT
MUTING
CIR.
MUTE
FDACK
FDREQ
HDACK
SELECTOR
HDACK
5DIC
(+1.8V)
+3.3D
SA[1]
HPIN
SPOFF
HPIN
SPOFF
INSERT SW
OR
(MUTE)
+5D
+12M
-12M
(MIC Cir.)
AN1
AN2
AN0
PTG[3]
PTG[4]
PTG[0]
PTF[1]
PTF[2]
RXD1
TXD1
RXD2
TXD2
SPOFF
HPIN
+3.3D_SWP
+VCC_INT1
+VCC_INT2
5to
3.3
5to
3.3
MIDI A IN
MIDI B IN
5DIC
DIC
+3.3D_SUB
+3.3D_SUB
+3.3D_SUB
+3.3D_SWP
+3.3D_SWP
+3.3D_SWP
+3.3D_SWP
+3.3D_SWP
3.3
to5
G
DIR
MI2CS
8-CS
HDREQ
+5D for CCFL-INV
+5D for PANEL
IC63
21,35,47,59,
71,85,97,111,
134,163,183,
205
13-16,17,18,20,
22-26,28,30-32,
34-44,46,48-52
53-56,58,60-68,
70,72-78,80,82,
84,85
1,37,38
24
27
15
55
2-23
28-35,
39-46
1,3,9,14,
27,43,49
19
16
15
17
18
39
38
37
22-26,
29-36
2,4,5,7,8,
10,11,13,
42,44,45,
47,48,50,
51,53
27
55
15
2-23,36
28-35,39-46
12,55,72,97,109
1
19
11-18
2-9
IC72
IC71
39
2-9
1
19
11-18
IC80
3
1
2
IC9
21,35,47,59,
71,85,97,111,
163,183,
8
9
10
11
12
176
115
116
159
103
117
157
158
193
190
189
114
129,130,135,141,142,166,
168,172,174,199-201,
53-56,
58-70,
73-78,
80,82,
84,86
13-20,22-26,
28,30-32,34,
36-45,49-52
(flash)
(flash)
37
28
11
14
1-8,26-25,48
29-36,
38-45
1,3,9,14,
27,43,49
19
16
15
17
18
39
38
37
22-26,
29-35
2,4,5,7,8,10,11,
13,42,44,45,47,
48,50,51,53
1,37,38
27
55
15
24
2-23
28-35,
39-46
1-8,10,
16-25,48
29-36,
38-45
IC7
1,12,16,35
17-22
23-34,
37-40
IC18
IC10
3
2
1
15
14
13
12
11
10
9
7
IC1
1,3,9,15,29,35,41,
43,49,55,75,81
(*A)
2,4,5,7,8,10,11,
13,74,76,77,79,
80,82,83,85
(*B)
31,33,34,36,37,39,
40,42,45,47,48,50,
51,53,54,56
D18
B19
1,37,38
2-23,36
24,27-35,
39-46
1,37,38
2-23,36
24,27-35,
39-46
2-23,36
24,27-35,
39-46
2-23,36
24,27-35,
39-46
IC42
IC43
1,3,9,15,29,
35,41,43,49,
55,75,81
IC25-29
6
5
14 15
IC30
1
2
13
12
5
25,44-46
IC2
4
IC8
3
2
IC64
2
3
IC1
IC2
JK1
IC1
IC2
IC1
IC2
JK2
JK3
JK5
JK4
JK6
CN3
IC3
IC48
4
5
23,24,28
16,17,
25,26
IC57
IC54
IC46
15
23
IC45
18
9
IC50
1,7
IC2
IC4
IC39
B15
(*C)
J1,K1-K3,L1-L3,
M1-M3,N1-N3
(*D)
B1,C1,C2,D1-D3,
E1-E3,F1-F4,G1-G3
(*E)
P4,R2,R3,T1-T5,U1-U3,
V1-V3,W1,W2
(*H)
A20-A26,B20-B26,C19-C26,
D20,D22,E20,E23,G22
(*I)
D26,E24,N25,N26,AD17-AD21,
AE17-AE22,AF18-AF20,AF22
(*J)
E25,E26,F24-F26,G23-G26,
H24-H26,J22-J26,K24-K26,
L22-L26,N22,N23
(*K)
M26,N24-N26,P24-P26,R24-R26,
T24-T26,U24-U26,V24-V26,W26
IC40
A10,A14,B15
(*F)
A6-A9,B6-B9,C7-C10,D9,
D11,E9,E11
(*G)
A1-A5,B2-B5,C3-C6,D5,
D6,E6
(*L)
AA1-AA3,AB1-AB3,AC1-AC3,
AD1,AD2,AE1,Y2-Y5,V4,V5,W3
11-14
3,5
IC6
1,7
2,6
IC3
JK2
JK4
JK3
1,7
2,6
VR2
IC5
1,7
2,6
VR1
IC1
IC7
OR
A
B
C
D
E
DIRECT
ACCESS
BACK
NEXT
F
G
H
I
J
EXIT
Inverter
SW. POWER
MASTER VOLUME
INPUT VOLUME
to AJACK-G4
Pitch Bend
Modulation
DATA ENTRY
MUTING
CIR.
FLASH
or
MASK
SPOUTL
SPOUTR
IC37
IC30(1/3), IC34, IC35, IC33(1/6), IC36
After conversion
signal name
After conversion
signal name
Main CPU
signal name
(C1-B3)
(C4-C6)
∗