Yamaha TSX-10, Service Manual

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TSX-10/15/20
TSX-10/15/20
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10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
32.768K
OUT
SQCK
MCLK CLK OUT
SOUT D
A
T
A OUT
SIN D
A
T
A IN
OPEN
ENC 2 ENC 1
CNVSS
XCIN
XCOUT
RESET
XOUT
VSS
XIN
VCC
GCTRL
DR
V
FEOF
BLKCK
REM IN
PO DO
WN
CE OUT
CLK OUT
D
ATA
I
N
D
A
T
A OUT
NC
DMUTE
/MLD
R
OM CE OUT
SEGMENT27 SEGMENT26 SEGMENT25 SEGMENT24 SEGMENT23 SEGMENT22 SEGMENT21 SEGMENT20 SEGMENT19 SEGMENT18 SEGMENT17 SEGMENT16 SEGMENT15 SEGMENT14 SEGMENT13 VSS SEGMENT12 VCC SEGMENT11 SEGMENT10 SEGMENT9 SEGMENT8 SEGMENT7 SEGMENT6 SEGMENT5 SEGMENT4 SEGMENT3 SEGMENT2 SEGMENT1 DIGIT1
DIGIT2
DIGIT3
DIGIT4
DIGIT5
DIGIT6
DIGIT7
DIGIT8
DIGIT9
DIGIT10
DIGIT11
DIGIT12
DIGIT13
STAT
/FLOCK
/TLOCK
NC
ROM DATA OUT
ROM DATA IN
ROM CLK OUT
LCK OUT
SEGMENT28
SEGMENT29
SEGMENT30
SEGMENT31
SEGMENT32
SEGMENT33
SEGMENT34
SEGMENT35
VEE
VPROTEC
A/D IN
/CMDSEL
LDR CTR
CLOSE
MUTE
/MNRST
AVSS
/QSEL
VREF
AVCC
21
IC201 : M30217MA-A209FP (Mask Rom) 16 bit µ-COM
M30218FCFP (Flash Rom)
No. Name Port IN/OUT Function
1 P97 DA0 OUT Air cooling fan control OUT (D-A) (OUT for checking clock at 32.768 kHz/test mode)
2 P96 SCLK22 S-CLK2 [CD] SQCK (Serial I/O - 2)
3 P95 SCLK21 S-CLK1 [CD] MCLK CLK OUT (Serial I/O - 2)
4 P94 SOUT2 S-OUT [CD] SOUT DATA OUT (Serial I/O - 2)
5 P93 SIN2 S-IN [CD] SIN DATA IN (Serial I/O - 2)
6 P92 (SSTB) OUT [CD] CD tray OPEN output
7 P91 (SBUSY) IN Rotary encoder B IN [Pull-up resistor required]
8 P90 (SRDY2) IN Rotary encoder A IN [Pull-up resistor required]
9 CNVSS – – Connected to Vss (GND) via a resistor (5.1k )
10 P87 XCIN – 32.768 kHz IN (Built-in feedback resistor)
11 P86 XCOUT – 32.768 kHz OUT (Built-in feedback resistor)
12 RESET – – RESET [0: RESET]
13 XOUT – – 10 MHz OUT (Built-in feedback resistor)
14 VSS – – GND
15 XIN – – 10 MHz IN (Built-in feedback resistor)
16 VCC – – Power 5V [Backup chemical capacitor for clock required]
17 P85 (INT5) OUT [CD] GCTRL
18 P84 (INT4) OUT [CD] DRV
19 P83 (INT3) OUT [CD] FEOF
20 P82 INT2 IN [CD] BLKCK
21 P81 INT1 INT-IN Remote control IN
22 P80 INT0 INT-IN Power down DC detect IN [0: POWER DOWN]
23 P77 CMOS OUT C 2 B (LC72131/LC72720/LC75342M) CE OUT [1: DATA transfer]
24 P76 CLK1 S-CLK LC72131/LC72720/LC75342M CLK OUT (Serial I/O-1)
25 P75 RxD1 S-IN LC72131/LC72720 DATA IN (Serial I/O-1)
26 P74 TxD1 S-OUT LC72131/LC72720/LC75342M DATA OUT (Serial I/O-1)
27 P73 (TA3in) OUT NC
28 P72 (TB2in) OUT [CD] DMUTE
29 P71 (TB1in) OUT [CD] /MLD
30 P70 (TB0in) OUT CE OUT to E 2 PROM [1: DATA transfer (E2PROM)]
31 P47 (CTS0) OUT Busy OUT from built-in flash ROM / Extension port (BU2092) LCK (latch) OUT
32 P46 CLK0 S-CLK CLK IN to built-in flash ROM / E
2
PROM / CLK OUT to BU2092 (Serial I/O-0)
33 P45 RxD0 S-IN DATA IN to built-in flash ROM / DATA IN from E 2 PROM (Serial I/O-0)
34 P44 TxD0 S-OUT DATA OUT from built-in flash ROM / E
2
PROM / DATA OUT to BU2092 (Serial I/O-0)
35 P43 (FLD51) OUT NC
36 P42 (FLD50) IN [CD] /TLOCK
37 P41 (FLD49) IN [CD] /FLOCK
38 P40 (FLD48) IN [CD] STAT
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