RX-V559/HTR-5950/DSP-AX559
56
RX-V559/HTR-5950/
DSP-AX559
IC60
: D70YE101RFP250 (DSP P.C.B)
Decoder/Post Processor
PIN NO.
SIGNAL NAME
TYPE
(1)
PULL
(2)
GPIO
(3)
DESCRIPTION
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
EM_D[14]
Core Supply (CVpp)
EM_D[13]
EM_D[12]
IO Supply (DVpp)
EM_D[11]
Ground(Vss)
EM_D[10]
EM_D[9]
Core Supply (CVpp)
EM_D[8]
EM_WE_DQM[1]
IO Supply (DVpp)
Ground(Vss)
EM_CLK
EM_CKE
Ground(Vss)
IO Supply (DVpp)
EM_A[11]
EM_A[9]
EM_A[8]
Core Supply (CVpp)
Ground(Vss)
EM_A[7]
EM_A[6]
IO Supply (DVpp)
Ground(Vss)
EM_A[5]
EM_A[4]
Core Supply (CVpp)
EM_A[3]
Ground(Vss)
EM_A[2]
EM_A[1]
Core Supply (CVpp)
EM_A[0]
IO Supply (DVpp)
EM_A[10]
EM_BA[1]
Ground(Vss)
EM_BA[0]
EM_CS[0]
EM_RAS
Ground(Vss)
EM_CS[2]
Core Supply (CVpp)
EM_RW
IO Supply (DVpp)
EM_OE
SPI0_ENA/I2C1_SDA
Ground(Vss)
SPI0_SCS/I2C1_SCL
SPI0_CLK/I2C0_SCL
Ground(Vss)
SPI0_SIMO
IO
IO
IO
IO
IO
IO
IO
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
IO
IO
IO
IO
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
Y
Y
Y
Y
EMIF Data Bus [lower 16 Bits]
EMIF Data Bus [lower 16 Bits]
EMIF Data Bus [lower 16 Bits]
EMIF Data Bus [lower 16 Bits]
EMIF Data Bus [lower 16 Bits]
EMIF Data Bus [lower 16 Bits]
EMIF Data Bus [lower 16 Bits]
Write Enable or Byte Enable for EM_D[15:8]
SDRAM Clock
SDRAM Clock Enable
EMIF Address Bus
EMIF Address Bus
EMIF Address Bus
EMIF Address Bus
EMIF Address Bus
EMIF Address Bus
EMIF Address Bus
EMIF Address Bus
EMIF Address Bus
EMIF Address Bus
EMIF Address Bus
EMIF Address Bus
SDRAM Bank Address and Asynchronous Memory LOW-Order Address
SDRAM Bank Address and Asynchronous Memory LOW-Order Address
SDRAM Chip Select
SDRAM Row Address Strobe
Asynchronous Memory Chip Select
Asynchronous Memory Read/not Write
SDRAM Output Enable
SPI0 Enable (Ready) or I2c1 Serial Data
SPI0 Slave Chip Select or I2c1 Serial Clock
SPI0 Serial Clock or I2c0 Serial Clock
SPI0 Data Pin Slave In Master Out
