Yamaha DME24N, Service Manual, Page: 39 / 289

39
DME24N/DME64N
PIN
NO.
I/O FUNCTION NAME
PIN
NO.
I/O FUNCTION NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
GPIO15/DTR#
GPIO14/RTS#
GPIO13/DSR#
GPIO12/CTS#
GPIO11/RSV1
GPIO10/MODE
GPIO9/TXD
GPIO8/RXD
V
SS
GPIO7/OSCCTL
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2/CRS
GPIO1
GPIO0/INT0
V
DD
EP_CS
EP_SK
EP_DI
EP_DO
SCL
SDA
V
SS
MII_COL
MII_TXD3
MII_TXD2
MII_TXD1
MII_TXD0
MII_TXEN
V
DD
MII_TXCLK
MII_RXER
MII_RXCLK
MII_RXDV
MII_RXD0
MII_RXD1
MII_RXD2
MII_RXD3
MDC
MDIO
OSC2
V
DD
V
SS
OSC1
V
DD
HCS#
HA0
HA1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I/O
I/O
O
O
I
O
OD/I
OD/I
I
O
O
O
O
O
I
I
I
I
I
I
I
I
O
I/O
O
I
I
I
I
General Purpose I/O [15:8]
Power supply (–) GND
General Purpose I/O [7:0]
MII Carrier Sense
General Purpose I/O [7:0]
Built-in logic power supply (+)
EEPROM Chip Select
EEPROM Serial Clock
EEPROM Data In
EEPROM Data Out
I
2
C Serial Clock
I
2
C Serial Data
Power supply (–) GND
MII Collision Detect
MII Transmit Data
MII Transmit Enable
Built-in logic power supply (+)
MII Transmit Clock
MII Receive Error
MII Receive Clock
MII Receive Data Valid
MII Receive Data
MII Management Interface Clock
MII Management Interface Data I/O
OSC1 clock pin
Built-in logic power supply (+)
Power supply (–) GND
OSC1 clock pin
Built-in logic power supply (+)
Host Chip Select: It is the host interface access control signal.
Host Address: It is the host interface port select signal.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
HA2
VSS
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
V
DD
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
V
SS
HRD0#
HRD1#
HWR0#
HWR1#
HINT
Reserve
Reserve
HIFSEL0
V
DD
PLLC
TEST0
HIFSEL1
HIFSEL2
HMUX
HINTPOL
TEST1
OSC4
V
SS
OSC3
V
DD
RESET#
HENDIAN
HSIZE
OSCO
DSIO
DST0
DST1
DST2
DPCO
DCLK
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
Tri
I
I
I
I
I
I
I
O
I
I
I
I
O
I/O
O
O
O
O
O
Host Address: It is the host interface port select signal.
Power supply (–) GND
Host Data: Data signal line of the host interface.
Built-in logic power supply (+)
Host Data: Data signal line of the host interface.
Power supply (–) GND
Host Read/Host Write
Host Interrupt
These pins are reserved for future expansion.
Host Interface Select
Built-in logic power supply (+)
PLL capacitor connecting pin
Test Input
Host Interface Select
Host Bus Multiplex
Host Interrupt Polarity Select
Test Input
OSC3 clock pin
Power supply (–) GND
OSC3 clock pin
Built-in logic power supply (+)
Hardware Reset Input
Host Interface Endian Select
Host Bus Size Select
OSC output pin
These pins are used for communication
with the debug tool ICD33.
SIS60000F00A500 (X4834A00) Intelligent Network Controller
DME24N JK: IC005
DME64N CA: IC901
PIN
NO.
I/O FUNCTION NAME
PIN
NO.
I/O FUNCTION NAME
1
2
3
4
5
6
7
8
9
10
11
12
RST
M/S
LRCK
SCLK
MCLK
VD
GND
VL
SDOUT
MDIV
HPF
I
2
S/LJ
I
I
I/O
I/O
I
I
I
I
O
I
I
I
Pin Description
Reset
Master/Slave Mode
Serial Clock
Master Clock
Digital Power
Ground
Logic Power
Serial Audio Data Output
MCLK Divider
High Pass Filter Enable
Serial Audio Interface Format Select 13
14
15
16
17
18
19
20
21
22
23
24 M0
M1
OVFL
AINL+
AINL–
GND
VA
AINR–
AINR+
VQ
REF_GND
FILT+
I
I
O
I
I
I
I
I
I
O
I
O
Mode Selection
Overflow
Differential Left Channel Analog Input
Ground
Analog Power
Differential Right Channel Analog Input
Quiescent Voltage
Reference Ground
Positive Voltage Reference
CS5361-KZ (X4951A00) ADC (Analog to Digital Converter)
DME24N AD: IC104, 304, 504, 704