Xycom XVME-653, Manual

Page: 69 / 113

Chapter 4 – Programming
4-13
12 34 56 78
78
56
34
12
12 34 56 78
12
34
56
78
Pentium Register (32 bit)
VMEbus
Address
M
M+1
M+2
M+3
XVME-653/658 VMEbus
Figure 4-2 Address-Invariant Translation
Notice that the internal data storage scheme for the PCI (Intel) bus is different from that
of the VME (Motorola) bus. For example, the byte 78 (the least significant byte) is
stored at location M on the PCI machine while the byte 78 is stored at the location M+3
on the VMEbus machine. Therefore, the data bus connections between the architectures
must be mapped correctly.