Xilinx ML628, User Manual, Page: 9 / 26

8 www.xilinx.com ML628 Board User Guide
UG771 (v1.0.1) June 28, 2011
Chapter 1: ML628 Board Features and Operation
The ML628 board block diagram is shown in Figure 1-1 .
Caution!
The ML628 board can be damaged by electrostatic discharge (ESD). Follow
standard ESD prevention measures when handling the board.
Detailed Description
Figure 1-2 shows the ML628 board described in this user guide. Each numbered feature
that is referenced in Figure 1-2 is described in the sections that follow.
Note:
Figure 1-2 is for reference only and might not reflect the current revision of the board.
X-Ref Target - Figure 1-1
Figure 1-1: ML628 Board Block Diagram
UG771_c1_01_022211
V irtex-6 FPGA
XC6
V
HX3
8
0T-2FFG1923C
12
V
Po
w
er In
FMC Interface
FMC1 FMC2
(A N SI/ V ITA 57.1-200 8 v 1.1)
System ACE
Controller
System Monitor
Interface
I2C B u s Management
GTX Transcei v er
Po w er Mod u le
FPGA Po w er So u rce
On-
b
oard Reg
u
lation:
V CCI N T 1.0 V at 40 Amps
V CCO 2.5 V at 20 Amps
V CCAUX 2.5 V at 20 Amps
A u xiliary Po w er
On- b oard Reg u lation:
5.0
V
at 13 Amps
3.3 V at 20 Amps
2.5 V at 20 Amps
User GPIO
P u sh B u ttons,
DIP S w itches,
and LEDs
200 MHz L V DS Clock,
Differential User SMA Clocks,
Singe-Ended User SMA Clocks
S u perClock-2 Mod u le
USB to UART
Bridge
Transcei
v
er and
Transcei v er Clock SMA
GTH QUAD_106
GTH QUAD_107
GTH QUAD_10
8
GTH QUAD_116
GTH QUAD_117
GTH QUAD_11
8
Transcei v er and
Transcei
v
er Clock SMA
GTX QUAD_100
GTX QUAD_101
GTX QUAD_102
GTX QUAD_103
GTX QUAD_104
GTX QUAD_105
GTX QUAD_112
GTX QUAD_113
GTX QUAD_114
GTX QUAD_115
GTH Transcei
v
er
Po w er Mod u le