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FMC XM104 Connectivity Card User Guide
7
UG536 (v1.1) September 24, 2010
Chapter 1
XM104
Overview
This document describes the FPGA Mezzanine Card (FMC) XM104 connectivity module,
referred to as the
XM104
in this guide. A
section and
are combined within this document.
Quick Start
System Requirements
Hardware
details the board validated to support the XM104. The ML605 board provides one
FMC high pin count (HPC) (J64) and one FMC low pin count (LPC) (J63) connector
interface. The XM104 connector must be installed on the HPC J64 connector of the ML605
board to have full functionality, as shown in
The XM104 can work on LPC FMC interfaces, but with limited functionality. Xilinx boards
containing LPC connectors are supported as follows:
•
SP601 - Si5368 clock source only
•
SP605 - Si5368 clock source and Data Port 0 (DP0) channel
•
ML605 LPC (J63) - Si5368 and DP0 channel
•
ML623 - Si5368 clock source only
•
SP623 - Si5368 clock source only
Table 1-1:
FMC Supported Boards
Xilinx Platform
Part Number
FMC HPC
Connector
FMC LPC
Connector
Virtex-6 FPGA ML605 Evaluation Kit
EK-V6-ML605-G
J64
J63
Notes:
While every effort has been made to comply with the
FPGA Mezzanine Card Specification
, Xilinx cannot
claim nor assume full compliance with the FMC/VITA-57-1 specification. Consequently, Xilinx cannot
claim nor support the usage of the XM104 on any other FMC (VITA-57.1) board.
Xilinx FMC cards are generally designed to implement expanded functionality for supported Xilinx
evaluation boards (SP601, SP605, or ML605) and thus might exceed the FMC card outline dimensions
discussed in the Single Width FMC Module Mechanical section of the FMC/VITA-57-1 specification.
Therefore, Xilinx FMC cards might not physically fit in a non-Xilinx evaluation board environment.