WinSystems PPC12-427, Product Manual

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PPC12-427/Configuration
v1.0 www.winsystems.com Page 21
Matching Connector
• Hirose DF13C 1.25 mm 3-pin
Part Number: DF13C-2S-1.25C
7.6.6 J6 - LVDS Data and Backlight Header (Internal)
The PPC12-427 utilizes the single channel LVDS connector and displays
video to the 12.1-inch TFT-LCD panel. This 12.1 panel supports 1024 x 768
at 60 Hz resolution, 24 bit (8 bits per pixel (bpp)).
The LVDS output signals are odd bus, differential signals to the LVDS
receiver. Each LVDS P output makes a differential pair with LVDS N .
Layout and Pin Reference
Connector
• Hirose DF13 Series 1.25 mm double row 30-pin
Pin Name Description Pin Name Description
1 LVDSAO_P Channel A - Positive LVDS
Output
2 LVDSBO_P Channel B - Positive LVDS
Output
3 LVDSAO_N Channel A - Negative LVDS
Output
4 LVDSBO_N Channel B - Negative LVDS
Output
5 GND Ground 6 GND Ground
7 LVDSCO_P Channel C - Positive LVDS
Output
8 LVDSDO_P Channel D - Positive LVDS
Output
9 LVDSCO_N Channel C - Negative LVDS
Output
10 LVDSDO_N Channel D - Negative LVDS
Output
11 GND Ground 12 GND Ground
13 LVDSCKO_P Positive LVDS Clock Output 14 DDC_SCL Open-drain DDC Data I/O
15 LVDSCKO_N Negative LVDS Clock Output 16 DDC_SDA Open-drain DDC Clock I/O
17 GND Ground 18 GND Ground
19 I2C_TC_SCL I2C Touch Control Clock 20 VCC_LVDS +3.3 VDC
21 I2C_TC_SDA I2C Touch Control Data 22 VCC_LVDS +3.3 VDC
23 GND Ground 24 GND Ground
25 BKLTPWM Backlight PWM brightness
control
26 BKLT_PWR Backlight Power (+5 VDC or
+12 VDC)
27 BKLT_EN Backlight Enable 28 BKLT_PWR Backlight Power (+5 VDC or
+12 VDC)
29 SEL68 Select 8/6-bit 30 BKLT_PWR Backlight Power (+5 VDC or
+12 VDC)
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