ITX-P-3800/Configuration
v1.0
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Page 27
7.4.21 eDP1 - eDP Interface
eDP1: eDP 2x10 pin (1.25 mm) connector
Layout and Pin Reference
Matching Connectors
•
Hirose DF13-20DP-1.25V
Cable Housing
•
Hirose DF13-20DS-1.25C
eDP1
Pin
Description
Pin
Description
1
Lane-0-DATA-
2
+12V or +5V
3
Lane-0-DATA+
4
+12V or +5V
5
Lane-1-DATA-
6
GND
7
Lane-1-DATA+
8
GND
9
Backlight enable
10
GND
11
PWM dimming for
eDP
12
GND
13
I
2
C data
14
+LCD (5V or 3.3V)
15
I
2
C clock
16
+LCD (5V or 3.3V)
17
eDP Aux+
18
+LCD (5V or 3.3V)
19
eDP Aux-
20
GND
Notes:
1. The eDP interface supports 2 lanes.
2. JVL2: eDP panel +5V/+3.3V (default) voltage select.
3. eDP1 PIN 9 for panel backlight enable. +5V Level
4. eDP1 PIN 11 for panel backlight dimming control
5. Pin 11 back light dimming control.
Provided 200Hz / 275Hz / 380 Hz/ 20KHz / 25KHz /100Hz and adjust PWM duty cycle by software program.
6. eDP and LVDS backlight dimming control selectable in BIOS.
pin 1
20
