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WM_PRJ_Q2686_PTS_001-010
June 30, 2009
Q2686 Wireless CPU
®
3.17
External Interrupt
The Q2686 Wireless CPU
®
provides two external interrupt inputs. These
interrupt inputs can be activated on:
•
High to low edge
•
Low to high edge
•
Low to high and high to low edge
When used, the interrupt inputs must not be left open.
If not used, they must be configured as GPIOs.
Pin description
Signal
Pin
number
I/O
I/O type
Reset
state
Description
Multiplexed
with
INT1 49 I 2V8
Z External
Interrupt GPIO25
INT0 50 I 1V8
Z External
Interrupt GPIO3
See Chapter 3.3, “Electrical information for digital I/O” for Open drain, 2V8 and 1V8 voltage
characteristics and Reset state definition.
Electrical characteristics of the signals
Parameter
Minimum Maximum
Unit
V
IL
0.84 V
INT1
V
IH
1.96
V
V
IL
0.54 V
INT0
V
IH
1.33
V
