WAGO-I/O-SYSTEM 750 XTR
Process Image 37
750-652/040-000 Serial Interface RS-232/RS-485 XTR
Manual
Version 1.3.0
The structure of the control and status bytes is described in the tables below.
Table 27: Control Byte C0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RC
X
X
X
X
IR
X
X
IR
Initialization/reset (If the bit is set, the module is in the reset state.
Communication is started only after resetting the bit).
RC
Reserved for internal communication
X
Not used
Table 28: Status Byte S0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RC
X
X
X
RCVT
CHK
0
LGT
LGT
The length of the telegram last received does not match the PI size.
CHK
Wrong checksum received.
RCVT
No error-free transmission of the opposite side was received for >= 200 ms
(timeout).
After the timeout has elapsed, an attempt is made to reestablish communication
between the I/O modules. If a valid telegram is received from the communication
partner, the RCVT bit is reset.
X
Not used
0
This value is always 0.
RC
Reserved for internal communication
For evaluation of the bits of the status byte, see chapter “Diagnostics”.