VersaLogic Blackbird VL-EPU4462, Hardware Reference Manual

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Multi-purpose I/O
VL-EPU-4562/4462 Reference Manual 43
The table below lists the pinout of the SPX connector.
Table 11: SPX Connector Pinout
Pin Signal Function
1 VCC
+5.0 V (
Note)
2 CLK SPX Clock
3 GND Ground
4 MISO Master input, Slave output
5 GND Ground
6 MOSI Master output, Slave input
7 GND Ground
8 SS0# Chip Select 0
9 SS1# Chip Select 1
Note. This power is off in sleep mode
SPI is, in its simplest form, a three wire serial bus. One signal is a clock, driven only by the
permanent master device on-board. The others are Data In and Data Out with respect to the
master. The SPX implementation on the Blackbird supports chip selects. The master device
initiates all SPI transactions. A slave device responds when its chip select is asserted and it
receives clock pulses from the master. All four common SPI modes are supported through the use
of clock polarity and clock idle state controls.
Cabling
An adapter cable, part number CBR-0901, is available. This is a 9-inch, 9-pin Pico-Clasp to Dual
SPX cable.
If your application requires a custom cable, the following information will be useful:
EPU-4562/4462 Board Connector Mating Connector
Molex 501568-0907 Molex 501330-0900