Vega ARIES DOT V1.0 Product Reference Manual Download Page 1

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ARIES DOT V1.0

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Product Reference Manual

Description

The ARIES DOT v1.0 is a circular development platform based on indigenously developed THEJAS32

SoC and a “Made in India” product to get started with basic microprocessor programming and embedded

systems. This board is built upon a RISC-V ISA compliant VEGA Processor with easy-to-use hardware and

software. The VEGA SDK also provides full ecosystem with numerous examples and support documentation.

This board is designed and developed by Centre for Development of Advanced Computing (C-DAC) as part of

the Digital India RISC-V (DIR-V) Program, by the Ministry of Electronics and Information Technology,

Government of India.

Target areas/Applications

Gesture controlled devices,Health monitoring devices,Low power IoT, Sensor fusion, Smart Meter,

System supervisors, Remote sensors, Wearable devices, Toy and electronic education equipment, Legacy

8/16-bit applications, Industrial networking and many more…

Summary of Contents for ARIES DOT V1.0

Page 1: ...hardware and software The VEGA SDK also provides full ecosystem with numerous examples and support documentation This board is designed and developed by Centre for Development of Advanced Computing C...

Page 2: ...Controller THEJAS32 SoC with VEGA ET1031 Microprocessor Memory 2MB Flash 256KB SRAM Peripherals PWM Pins 8 nos Analog Input Pins 4 nos SPI 2 nos UART 2 nos I2C 1 nos GPIOs 15 nos 14xGPIO 1x LED Clock...

Page 3: ...4 2 1 Recommended Operating Conditions 4 2 2 Power Consumption 4 3 Functional Overview 4 3 1 Board Topology 4 3 2 Processor 5 3 3 THEJAS32 pinout 5 3 4 Power Tree 8 4 Board Operation 8 4 1 Getting St...

Page 4: ...0 is a development platform based on THEAJS32 ASIC which operates at a frequency of 100MHz THEJAS32 SoC includes VEGA ET1031 Microprocessor 256KB internal SRAM Three UARTs Four SPIs Three TIMERs Eigh...

Page 5: ...DDC18 Positive supply for logic Connect to 1 2V supply 9 PVSSC18 Ground reference for logic 10 SPI3MISO SPI 3 Master In Slave Out 11 SPI3CLK SPI 3 Clock 12 SPI3CSN SPI 3 Chip Select 13 PVSSIOC21 Groun...

Page 6: ...O 53 GPIO0 13 General purpose IO 54 GPIO0 12 General purpose IO 55 GPIO0 11 General purpose IO 56 PVSSC11 Ground reference for logic 57 PVDDC11 Positive supply for logic Connect to 1 2V supply 58 GPIO...

Page 7: ...102 SPI2CSN SPI 2 Chip Select 103 PVSSIOC4 Ground reference for IO pins 104 PVDDIO4 Positive supply for IO pins Connect to 3 3V supply 105 URT2SIN UART 2 Serial In Receive 106 URT2SOUT UART 2 Serial...

Page 8: ...r programming follow the steps given in the link below For Linux https bit ly vega linux For Windows https bit ly vega windows To use Eclipse IDE for programming follow the steps given in the link bel...

Page 9: ...REMARKS 1 SPI 3 SPI0_SS TP_20 2 SPI0_SCLK TP_18 3 SPI0_MISO TP_16 4 SPI0_MOSI TP_13 5 SPI1_SS TP_41 6 SPI1_SCLK TP_39 7 SPI1_MISO TP_37 8 SPI1_MOSI TP_35 9 SPI3_SS U5_1 Connected to SPI BOOT FLASH IC...

Page 10: ...7 TP_3 29 GPIO 15 GPIO0 TP_5 30 GPIO1 TP_7 31 GPIO2 TP_9 32 GPIO3 TP_10 33 GPIO4 TP_11 34 GPIO5 TP_12 35 GPIO6 TP_14 36 GPIO7 TP_15 37 GPIO8 TP_17 38 GPIO9 TP_19 39 GPIO10 TP_21 40 GPIO11 TP_23 41 GPI...

Page 11: ...ES DoT v1 0 details https vegaprocessors in devboards ariesdot html ARIES Centre for Development of Advanced Computing C DAC Board Outline Mounting Holes Dimensions in mm DAC Hardware Design Group Cen...