Vaisala RVP900, User Manual, Page: 437 / 484

Table 126 RVP901-WSP Customizations for ASR9 WSP
Feature Description
5 input channels with up to 100 MHz 16-bit sampling • 30 MHz filter on J13A / ADC-A port targeted at a
31.07 MHz IF frequency
• The COHO is filtered with a 30 MHz IF filter and
split to drive the ADC-E and CLK-IN port as in the
original RVP7 implementation.
General Purpose IO • GPIO differential signal 0 is configured as the pre-
trigger
• GPIO Differential signals 2, 4 and 6 are configured
as inputs and used as a serial data interface to
allow the RCP903 panel to provide header
information
I
/
Q
data is output over Ethernet using UDP with
command and status functions set using TCP/IP.
I
/
Q
data is sent over Ethernet processed and past to
the Time Series Interface.
Header information is used as a tag to synchronize the
RVP900
I
/
Q
data with the ASR9 data stream.
AC Power option
24V Fan
G.4.2 RVP902-WSP Processor Customized for ASR9 WSP
RVP902-WSP Processor is Vaisala's standard product offering with a Xeon X8DTU
motherboard running CentOS 6.4, RVP900, and radar utilities. The key features are:
• Dual Xeon E5620 Intel 2.4GHz Quad-Core processor with 1333 MHz front side bus
• 2U 19" rack-mounted chassis
• WDC 2TB 7.2K SATA 6Gbps 3.5" HDD
• 16 GB Memory
• Dual 500 GB 7.2 RPM SATA hard disk
• 4x External 2.0 USB: 2 in the front, 2 in the back
• PS/2 keyboard and mouse
• 2 serial interfaces (1 front, 1 back)
• 2 Ethernet (10/100/1000)
• 700 W redundant power supplies
• VGA port
• 4x PCI expansion slots: 1x PCIe 2.0 x 8 and 3x PCI-X
• DVD-RW
• 0,1,5,10 Software RAID
• RoHs
• 10 ... 35 °C operating temperature
G.4.3 RCP903 ASR9-WSP Custom Panel
The main features of RCP903 are as follows:
• CPLD and FLASH memory to configure the panel and load the application
• Altera Cyclone IV FPGA and 16 MB of SRAM
Appendix G – RCP903 ASR9-WSP Panel
435