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SARA-R5 series - System integration manual 

UBX-19041356 - R04 

Design-in

  

Page 97 of 118 

C1-Public  

 

 

2.13.2

 

Layout checklist 

The following are the most important points for a simple layout check: 

 

Check 50 

 nominal characteristic impedance of the RF transmission line connected to the 

ANT

 

port (cellular antenna RF interface). 

 

Check cellular antenna trace design for regulatory compliance perspective (see section 

4.2.3

 for 

FCC United States, sectio

4.3.2

 for ISED Canada, and related section 

2.4.2.3

)

 

For SARA-R510M8S, check 50 

 nominal characteristic impedance of the RF transmission line 

connected to the 

ANT_GNSS

 port (GNSS antenna RF interface). 

 

Ensure  no  coupling  occurs  between  the  RF  interfaces  and  noisy  or  sensitive  signals  (like  SIM 

signals and high-speed digital lines). 

 

Optimize placement for minimum length of RF lines. 

 

Check  the  footprint  and  paste  mask  designed  for  SARA-R5  series  module  as  illustrated  in 

section 

2.11

. 

 

VCC

 line should be enough wide and as short as possible. 

 

Route 

VCC

 supply line away from RF lines / parts (refer to 

Figure 29

) and other sensitive analog 

lines / parts. 

 

The 

VCC

 bypass capacitors in the picoFarad range should be placed as close as possible to the 

VCC

 pins, in particular if the application device integrates an internal antenna. 

 

Ensure an optimal grounding connecting each 

GND

 pin with application board solid ground layer. 

 

Use  as  many  vias  as  possible  to  connect  the  ground  planes  on  multilayer  application  board, 

providing a dense line of vias at the edges of each ground area, in particular along RF and high 

speed lines. 

 

Keep  routing  short  and  minimize  parasitic  capacitance  on  the  SIM  lines  to  preserve  signal 

integrity. 

 

USB_D+

 / 

USB_D-

 traces should meet the characteristic impedance requirement (90 

 differential 

and 30 

 common mode) and should not be routed close to any RF line / part. 

 

2.13.3

 

Antennas checklist 

 

Antenna  termination  should  provide  50 

  characteristic  impedance  with  V.S.W.R  at  least  less 

than 3:1 (recommended 2:1) on operating bands in deployment geographical area. 

 

Follow  the  recommendations  of  the  antenna  producer  for  correct  antenna  installation  and 

deployment (PCB layout and matching circuitry). 

 

Ensure compliance with any regulatory agency RF radiation requirement, as reported in section 

4.2.2

 for FCC United States, in sectio

4.3.1

 for ISED Canada, and in sectio

4.4

 for RED Europe. 

 

Ensure  high  isolation  between  the  cellular  antenna  and  any  other  antennas  or  transmitters 

present on the end device. 

 

For SARA-R510M8S, ensure high isolation between the cellular antenna and the GNSS antenna 

(see also sectio

2.4.4

) 

 

Summary of Contents for SARA-R5 Series

Page 1: ...he size optimized SARA R5 series cellular modules based on the u blox UBX R5 cellular chipset The modules are specifically designed for IoT integrating an in house developed cellular modem end to end trusted domain security and u blox s leading GNSS technology The modules deliver high performance satellite positioning alongside data connectivity in the very small and compact SARA form factor ...

Page 2: ...ntains the final product specification This document applies to the following products Product name Type number Modem version Application version PCN reference Product status SARA R500S SARA R500S 00B 00 02 05 A00 01 UBX 20037360 Initial production SARA R510S SARA R510S 00B 00 02 05 A00 01 UBX 20037360 Initial production SARA R510M8S SARA R510M8S 00B 00 02 05 A00 01 UBX 20037360 Initial production...

Page 3: ...ntenna RF interface ANT_GNSS 27 1 7 3 Cellular antenna detection interface ANT_DET 28 1 8 SIM interface 28 1 8 1 SIM card interface 28 1 8 2 SIM card detection interface GPIO5 28 1 9 Data communication interfaces 29 1 9 1 UART interfaces 29 1 9 2 USB interface 37 1 9 3 SPI interfaces 37 1 9 4 SDIO interface 38 1 9 5 DDC I2C interface 38 1 10 Audio 38 1 11 General purpose input output GPIO 39 1 12 ...

Page 4: ...put output GPIO 92 2 8 1 Guidelines for GPIO circuit design 92 2 8 2 Guidelines for general purpose input output layout design 93 2 9 Reserved pin RSVD 93 2 10 Module placement 93 2 11 Module footprint and paste mask 94 2 12 Schematic for SARA R5 series module integration 95 2 13 Design in checklist 96 2 13 1 Schematic checklist 96 2 13 2 Layout checklist 97 2 13 3 Antennas checklist 97 3 Handling...

Page 5: ... Innovation Science Economic Development Canada notice 106 4 3 1 Declaration of Conformity 106 4 3 2 Modifications 107 4 4 European Conformance 108 4 5 GITEKI Japan 109 5 Product testing 110 5 1 u blox in series production test 110 5 2 Test parameters for OEM manufacturers 110 5 2 1 Go No go tests for integrated devices 111 5 2 2 Cellular RF functional tests 111 5 2 3 GNSS RF functional tests 112 ...

Page 6: ...ed TLS DTLS FW update via serial FOAT u blox Firmware update Over the Air uFOTA LwM2M with dynamically loaded objects Embedded MQTT MQTT SN Embedded CoAP Last gasp Jamming detection Antenna and SIM detection Standard Professional Automotive SARA R500S Multi Region 14 M1 NB2 SARA R510S Multi Region 14 M1 NB2 SARA R510M8S Multi Region 14 M1 NB2 LTE Bands 1 2 3 4 5 8 12 13 18 19 20 26 28 in M1 and NB...

Page 7: ... 1900 MHz 1 Band 26 850 MHz Band 28 700 MHz Band 66 1700 MHz 2 Band 71 600 MHz 2 Band 85 700 MHz 2 Band 1 2100 MHz Band 2 1900 MHz Band 3 1800 MHz Band 4 1700 MHz Band 5 850 MHz Band 8 900 MHz Band 12 700 MHz Band 13 750 MHz Band 18 850 MHz Band 19 850 MHz Band 20 800 MHz Band 25 1900 MHz 1 Band 26 850 MHz Band 28 700 MHz Band 66 1700 MHz 2 Band 71 600 MHz 2 Band 85 700 MHz 2 Band 1 2100 MHz Band ...

Page 8: ...y SIM I2S GPIOs Reset Power on UART USB DDC I2C PA UBX R5 Cellular chipset BaseBand processor Power Management Unit RF transceiver Filter Filter Switch SPI SDIO Secureelement eSIM 32 kHz 26 MHz TCXO Figure 1 SARA R500S block diagram V_INT I O VCC supply ANT_DET ANT Flash memory SIM I2S GPIOs Reset Power on UART USB DDC I2C PA UBX R5 Cellular chipset BaseBand processor Power Management Unit RF tran...

Page 9: ...escribed herein with more details than the simplified block diagrams of Figure 1 Figure 2 and Figure 3 RF section The RF section is composed of the following main elements RF switch connecting the antenna port ANT to the suitable RF Tx Rx paths for LTE Cat M1 NB2 Half Duplex operations Power Amplifiers PA amplifying the Tx signal modulated and pre amplified by the RF transceiver RF filters along t...

Page 10: ...reference in the low power idle mode which can be enabled using the UPSV AT command and in the PSM deep sleep mode which can be enabled using the CPSMS in addition to the UPSV AT command GNSS section The GNSS section based on the u blox UBX M8 GNSS chipset is composed of the following main elements illustrated in Figure 4 u blox UBX M8030 concurrent GNSS chipset with SPG 3 01 firmware version Dedi...

Page 11: ...ic purposes RESET_N 18 I External reset input Internal active pull up See section 1 6 3 for functional description See section 2 3 2 for external circuit design in Provide test point for diagnostic purposes Antenna ANT 56 I O Cellular antenna 50 nominal characteristic impedance Antenna circuit affects the RF performance and application device compliance with required certification schemes See sect...

Page 12: ...put AUX UART request to send input USIO variant 0 Pin disabled USIO variant 1 Primary UART circuit 107 DSR in ITU T V 24 USIO variants 2 3 4 Auxiliary UART circuit 105 RTS in ITU T V 24 Internal active pull up enabled See section 1 9 1 for functional description See section 2 6 1 for external circuit design in RI 7 O UART ring indicator output AUX UART clear to send output USIO variants 0 1 Primar...

Page 13: ...alternatively settable as SDIO SPI supported by 00 product version for diagnostics only SDIO_D2 44 I O SPI clock SPI clock alternatively configurable as SDIO SPI supported by 00 product version for diagnostics only SDIO_D3 48 I O SPI Chip Select SPI Chip Select alternatively configurable as SDIO SPI supported by 00 product version for diagnostics only SDIO SDIO_D0 47 I O SDIO serial data 0 SDIO se...

Page 14: ...1 for functional description See section 2 8 for external circuit design in GPIO5 42 I O GPIO Pin with alternatively configurable functions See sections 1 8 2 and 1 11 for functional description See sections 2 5 and 2 8 for external circuit design in GPIO6 19 I O GPIO Pin with alternatively configurable functions See section 1 11 for functional description See section 2 8 for external circuit desi...

Page 15: ... communication No RF Tx Rx in progress communication dropped Remove VCC Switch on PWR_ON RTC alarm Not powered Power off Active Connected Deep sleep Switch off AT CPWROFF Apply VCC SARA R510S If low power mode is enabled if AT inactivity timer is expired if no other concurrent activity is executed Idle Network paging Data received over UART RTC alarm Apply VCC SARA R500S and SARA R510M8S Figure 5 ...

Page 16: ...S modules the available communication interfaces are not functional a wake up event consisting in proper toggling of the PWR_ON input line or the expiration of the Periodic Update Timer set by the LTE network is necessary to trigger the wake up routine of the modules that subsequently enter back into the active mode SARA R5 series modules can be gracefully switched off by the dedicated CPWROFF AT ...

Page 17: ...ue during Tx conditions specified in the SARA R5 series data sheet 1 The maximum average current consumption can be greater than the specified value according to the actual antenna mismatching temperature and supply voltage Section 1 5 1 2 describes current consumption profiles in connected mode VCC voltage ripple Noise in the supply pins must be minimized High supply voltage ripple values during ...

Page 18: ...ssible but it must periodically monitor the paging channel of the current base station paging block reception in accordance to the LTE system requirements even if connected mode is not enabled by the application When the module monitors the paging channel it wakes up to the active mode to enable the reception of the paging block In between the module switches to low power mode This is known as dis...

Page 19: ... the SARA R5 series data sheet 1 ACTIVE MODE Paging period Time s Current mA Time ms Current mA RX enabled 0 1 00 0 1 00 Figure 9 VCC current consumption profile with low power mode disabled and module registered with the network active mode is always held and the receiver is periodically activated to monitor the paging channel for paging block reception 1 5 2 Generic digital interfaces supply out...

Page 20: ...ch on routine can be triggered by Applying a voltage at the VCC module supply input within the operating range and then forcing a low level at the PWR_ON input pin normally high due to internal pull up for a valid time period see SARA R5 series data sheet 1 When the SARA R5 series modules are in the power off mode i e switched off but with a valid voltage present at the VCC module supply input or ...

Page 21: ...Module interfaces are configured Start up event 3 6 s 0 s Greetingtext Figure 12 SARA R500S SARA R510M8S switch on sequence description from not powered mode Figure 13 shows the SARA R510S modules switch on sequence from the not powered mode The external power supply is applied to the VCC module pins The PWR_ON pin is held low for a valid time period representing the start up event All the generic...

Page 22: ...h on wake up sequence description from power off deep sleep mode 1 6 1 4 General considerations for the switch on procedure If the greeting text is not used by the external application to detect that the module is ready to reply to AT commands then the only way of checking it is polling the external application can start sending AT after that the CTS line is set to the ON state in case UART is use...

Page 23: ...lse at the PWR_ON and RESET_N input pins in the proper sequence described in the SARA R5 series data sheet 1 It is recommended to avoid an abrupt emergency hardware shutdown during SARA R5 series modules normal operations An abrupt software reset consisting in asserting the RESET_N input must be preferred if considered necessary see section 1 6 3 An abrupt under voltage shutdown occurs on SARA R5 ...

Page 24: ...nters not powered mode if the VCC supply is removed VCC PWR_ON RESET_N V_INT AT CPWROFF sent to the module OK replied by the module VCC can be removed Figure 15 SARA R5 series modules switch off sequence by means of CPWROFF AT command It is highly recommended to monitor the V_INT pin to sense the end of the switch off sequence The duration of each phase in the SARA R5 series modules switch off rou...

Page 25: ...idered necessary an abrupt software reset must be preferred to an abrupt emergency hardware shutdown or an abrupt removal of the VCC supply In case of applications where an abrupt power removal cannot be avoided it is recommended to set the RESET_N input line at the low logic level as soon as the power failure in the supply source is detected so that the under voltage shutdown may be executed more...

Page 26: ...VSWR 2 1 recommended S11 6 dB VSWR 3 1 acceptable The return loss or the S11 as the VSWR refers to the amount of reflected power measuring how well the antenna RF connection matches the 50 characteristic impedance of the ANT port The impedance of the antenna termination must match as much as possible the 50 nominal impedance of the ANT port over the operating frequency range reducing as much as po...

Page 27: ... Galileo 1575 MHz GLONASS 1602 MHz The required frequency range of the antenna connected to ANT_GNSS port depends on the selected GNSS constellations Return loss S11 10 dB VSWR 2 1 recommended S11 6 dB VSWR 3 1 acceptable The return loss or the S11 as the VSWR refers to the amount of reflected power measuring how well the antenna RF connection matches the 50 characteristic impedance of the ANT_GNS...

Page 28: ...ed by the connected SIM card or chip Both 1 8 V and 3 V SIM types are supported Activation and deactivation with automatic voltage switch from 1 8 V to 3 V are implemented according to ISO IEC 7816 3 specifications The VSIM supply output provides internal short circuit protection to limit start up current and protects the SIM to short circuits 1 8 2 SIM card detection interface GPIO5 The GPIO5 pin...

Page 29: ...and see the SARA R5 series AT commands manual 2 USIO AT command in the following variants Variant 0 default configuration consisting in a single UART interface on RXD TXD CTS RTS DTR RI pins supporting o AT commands o data communication o multiplexer protocol functionality see 1 9 1 4 o FW update by means of FOAT o FW update by means of the u blox EasyFlash tool see the firmware update application...

Page 30: ...en USIO variant 4 is set second auxiliary UART interface does not support flow control and status of its CTS line RI pin can be ignored UART general features valid for all variants are Serial port with RS 232 functionality conforming to the ITU T V 24 recommendation 5 with CMOS compatible levels 0 V for low data bit or ON state and 1 8 V for high data bit or OFF state Hardware flow control default...

Page 31: ...ariant 2 3 or 4 is set are set by default to the OFF state high level at UART initialization The module holds these lines in the OFF state until the module transmits some data The module data input lines TXD only if USIO variant 0 or 1 is set TXD and DTR if USIO variant 2 3 or 4 is set are assumed to be controlled by the external host once UART is initialized The data input lines have an internal ...

Page 32: ... 1 or 4 Disabled AT K0 ON or OFF ON or OFF The first character sent by the DTE is lost but after 15 ms the UART and the module are waked up recognition of subsequent characters is guaranteed after the complete UART module wake up Data sent by the module are correctly received by the DTE if it is ready to receive data otherwise data are lost 2 Enabled AT K3 ON or OFF ON or OFF Not applicable HW flo...

Page 33: ...the periodic UART wake up to receive or send data If the module needs to transmit some data over the UART e g URC During a PSD data call with external context activation If a character is sent by the DTE with HW flow control disabled the first character sent causes the system wake up due to the wake up via data reception feature described in the following subsection and the UART will be then kept ...

Page 34: ...The UART is disabled as long as the RTS line is held to OFF but the UART is enabled in the following cases If the module needs to transmit some data over the UART e g URC During a PSD data call with external context activation When an OFF to ON transition occurs on the RTS input line the UART is re enabled and the module if it was in idle mode switches from idle to active mode after 15 ms this is ...

Page 35: ...acter received this is the system wake up time As a consequence the first character sent by the DTE when the UART is disabled i e the wake up character is not a valid communication character even if the wake up via data reception configuration is active because it cannot be recognized and the recognition of the subsequent characters is guaranteed only after the complete system wake up i e after 15...

Page 36: ...s are sent The wake up character wakes up the module UART The other characters must be sent after the wake up time of 15 ms If this condition is satisfied the module DCE recognizes characters The module will disable the UART after 2000 GSM frames from the latest data reception DCE UART is enabled for 2000 GSM frames 9 2s after the last data received time Wake up time 15 ms time Wake up character N...

Page 37: ...d on main primary UART for more details see the mux application note 9 Channel 0 control channel Channel 1 3 AT commands data communication Channel 4 GNSS tunneling When USIO variant 4 is set GNSS tunneling is available on second auxiliary UART and the following virtual channels are defined on main primary UART for more details see the mux application note 9 Channel 0 control channel Channel 1 3 A...

Page 38: ...erface over the SDA and SCL pins available to communicate with an external u blox GNSS receiver and with external I2C devices as for example an audio codec the SARA R5 series module acts as an I2C master that can communicate with I2C slaves in accordance with the I2C bus specifications 10 The same 1 8 V I2C bus compatible DDC interface is internally connected to the u blox M8 GNSS chipset integrat...

Page 39: ...GPIO5 GPIO6 Module operating mode indication Output indicating module operating mode power off deep sleep or idle mode versus active or connected mode GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 Ring indicator Output providing events indicator GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 Last gasp Input to trigger last gasp notification GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 Time pulse output Output providing accurat...

Page 40: ...low the suggestions provided in the relative section 2 2 1 for schematic and layout design 3 SIM interface VSIM SIM_CLK SIM_IO SIM_RST pins Accurate design is required to guarantee SIM card functionality reducing the risk of RF coupling Carefully follow the suggestions provided in relative section 2 5 for schematic and layout design 4 System functions PWR_ON and RESET_N pins Accurate design is req...

Page 41: ... V Yes greater than 5 V Yes always available Figure 21 VCC supply concept selection The switching step down regulator is the typical choice when primary supply source has a nominal voltage much higher e g greater than 5 V than the operating supply voltage of SARA R5 series The use of switching step down provides the best power efficiency for the overall application and minimizes current drawn from...

Page 42: ... requirements summarized in Table 5 2 2 1 2 Guidelines for VCC supply circuit design using a switching regulator The use of a switching regulator is suggested when the difference from the available supply rail source to the VCC value is high since switching regulators provide good efficiency transforming a 12 V or greater voltage supply to the typical 3 8 V value of the VCC supply The characterist...

Page 43: ...pacitor ceramic X5R 25 V Generic manufacturer C6 100 nF capacitor ceramic X7R 16 V GCM155R71C104KA55 Murata C7 10 nF capacitor ceramic X7R 16 V GRT155R71C103KE01 Murata C8 68 pF capacitor ceramic C0G 0402 5 50 V GRM1555C1E680JA01 Murata C9 15 pF capacitor ceramic C0G 0402 5 50 V GJM1555C1H150JB01 Murata D1 Schottky diode 30 V 2 A MBR230LSFT1G ON Semiconductor L1 4 7 H inductor 20 2 A SLF7045T 4R7M...

Page 44: ...s where the module VCC is supplied by an LDO linear regulator capable of delivering maximum peak pulse current specified for LTE use case with suitable power handling capability It is recommended to configure the LDO linear regulator to generate a voltage supply value slightly below the maximum limit of the module VCC normal operating range e g 4 1 V for the VCC as in the circuits described in Fig...

Page 45: ...ischarge current is not always reported in the data sheets of batteries but the maximum DC discharge current is typically almost equal to the battery capacity in Amp hours divided by 1 hour DC series resistance the non rechargeable battery with its output circuit must be capable of avoiding a VCC voltage drop below the operating range summarized in Table 5 during transmission 2 2 1 6 Guidelines fo...

Page 46: ...c manufacturer U1 Single cell Li Ion or Li Pol battery charger IC MCP73833 Microchip Table 12 Suggested components for the Li Ion or Li Pol battery charging application circuit See the section 2 2 1 9 and in particular Figure 28 Table 15 for the parts recommended to be provided if the application device integrates an internal antenna 2 2 1 7 Guidelines for external charging and power path manageme...

Page 47: ...upply source for the module and starts a charging phase accordingly The MP2617H IC normally provides a supply voltage to the module regulated from the external main primary source allowing immediate system operation even under missing or deeply discharged battery the integrated switching step down regulator is capable to provide up to 3 A output current with low output ripple and fixed 1 6 MHz swi...

Page 48: ...ufacturer B1 Li Ion or Li Pol battery pack with 10 k NTC Various manufacturer C1 C5 C6 22 F capacitor ceramic X5R 0603 10 25 V GRM188R60J226MEA0 Murata C2 C4 C10 100 nF capacitor ceramic X7R 0402 10 16 V GCM155R71C104KA55 Murata C3 1 F capacitor ceramic X7R 0603 10 25 V GCM188R71E105KA64 Murata C7 C12 68 pF capacitor ceramic C0G 0402 5 50 V GRM1555C1H680JA16 Murata C8 C13 15 pF capacitor ceramic C...

Page 49: ...µF capacitor ceramic X5R 0603 20 6 3 V GRM188R60J106ME47 Murata C2 10 nF capacitor ceramic X7R 0402 10 16 V GRT155R71C103KE01 Murata C3 100 nF capacitor ceramic X7R 0402 10 16 V GCM155R71C104KA55 Murata C4 68 pF capacitor ceramic C0G 0402 5 50 V GRM1555C1H680JA16 Murata C5 15 pF capacitor ceramic C0G 0402 5 25 V GJM1555C1H150JB01 Murata R1 R3 47 k resistor 0402 5 0 1 W Generic manufacturer R2 10 k...

Page 50: ...d at the end of RF transmission 10 F capacitor or greater capacitor with low ESR e g Murata GRM188R60J106ME47 An additional series ferrite bead may be provided for additional RF noise filtering in particular if the application device integrates an internal antenna Ferrite bead specifically designed for EMI noise suppression in the GHz frequency band e g the Murata BLM18EG221SN1 placed as close as ...

Page 51: ... source is a switching DC DC converter place the large capacitor close to the DC DC output and minimize VCC track length Otherwise consider using separate capacitors for DC DC converter and module The bypass capacitors in the pF range described in Figure 28 and Table 15 should be placed as close as possible to the VCC pins where the VCC line narrows close to the module input pins improving the RF ...

Page 52: ... commands the module to transmit at maximum power correct grounding helps prevent module overheating 2 2 2 Generic digital interfaces supply output V_INT 2 2 2 1 Guidelines for V_INT circuit design SARA R5 series modules provide the V_INT generic digital interfaces 1 8 V supply output which can be mainly used to Indicate when the module is switched on and it is not in the deep sleep power saving m...

Page 53: ...HSG varistor close to the accessible point An open drain or open collector output is suitable to drive the PWR_ON input from an application processor as described in Figure 30 PWR_ON input pin should not be driven high by an external device as it may cause start up issues SARA R5 series 15 PWR_ON Push button ESD Open drain output Application Processor SARA R5 series 15 PWR_ON TP TP Figure 30 PWR_O...

Page 54: ...is suitable to drive the RESET_N input from an application processor as described in Figure 31 RESET_N input pin should not be driven high by an external device as it may cause start up issues SARA R5 series 18 RESET_N Push button ESD Open drain output Application Processor SARA R5 series 18 RESET_N TP TP Figure 31 RESET_N application circuits using a push button and an open drain output of an app...

Page 55: ...of the application PCB close to the ANT and ANT_GNSS pads On a multilayer board the whole layer stack below the RF connections should be free of digital lines Increase GND keep out i e clearance a void area around the ANT and ANT_GNSS pads on the top layer of the application PCB to at least 250 m up to adjacent pads metal definition and up to 400 m on the area below the module to reduce parasitic ...

Page 56: ...per L4 copper FR 4 dielectric FR 4 dielectric FR 4 dielectric 380 µm 500 µm 500 µm Figure 33 Example of 50 coplanar waveguide transmission line design for the described 4 layer board layup 35 µm 35 µm 1510 µm L2 copper L1 copper FR 4 dielectric 1200 µm 400 µm 400 µm Figure 34 Example of 50 coplanar waveguide transmission line design for the described 2 layer board layup If the two examples do not ...

Page 57: ...lel to transmission lines or crossing the transmission lines on buried metal layer Do not route microstrip lines below discrete component or other mechanics placed on top layer Two examples of a suitable RF circuit design for ANT pin are illustrated in Figure 35 where the cellular antenna detection circuit is not implemented if the cellular antenna detection function is required by the application...

Page 58: ...RF line at 50 e g the active pad of U FL connector needs to have a GND keep out i e clearance a void area at least on the first inner layer to reduce parasitic capacitance to ground If an integrated antenna is used the integrated antenna represents the RF terminations The following guidelines should be followed Use an antenna designed by an antenna manufacturer providing the best possible return l...

Page 59: ... long cable Large insertion loss reduces both transmit and receive radiation performance o A high quality 50 RF connector provides a clean PCB to RF cable transition It is recommended to strictly follow the layout and cable termination guidelines provided by the connector manufacturer Integrated antennas e g PCB antennas such as patches or ceramic SMT elements o Internal integrated antennas imply ...

Page 60: ...1 the RED Europe notice reported in section 4 4 2 4 2 2 Examples of cellular antennas Table 18 lists some examples of possible internal on board surface mount cellular antennas Manufacturer Part number Product name Description Taoglas PA 710 A Warrior Cellular SMD antenna 698 960 MHz 1710 2170 MHz 2300 2400 MHz 2490 2690 MHz 40 0 x 6 0 x 5 0 mm Taoglas PCS 26 A Havok LTE SMD dielectric antenna 617...

Page 61: ... U FL 690 960 MHz 1710 2170 MHz 2500 2700 MHz 110 0 x 21 0 mm Table 19 Examples of internal cellular antennas with cable and connector Table 20 lists some examples of possible external cellular antennas Manufacturer Part number Product name Description Taoglas GSA 8842 A 105111 Wideband LTE I Bar adhesive antenna with cable and SMA M 617 960 MHz 1710 2700 MHz 4900 5850 MHz 176 5 x 59 2 x 13 6 mm T...

Page 62: ...f antenna trace design change an FCC Class II Permissive Change and or ISED Class IV Permissive Change application is required to be filed by the grantee or the host manufacturer can take responsibility through the change in FCC ID and or the ISES Multiple Listing new application procedure followed by an FCC C2PC and or ISED C4PC application The antenna trace design is implemented on the u blox ho...

Page 63: ...0 µm 300 µm 300 µm RF trace L1 L4 via Top layer L1 Layout 35 µm 35 µm 35 µm 35 µm 220 µm 220 µm 1200 µm Top layer L1 copper L3 copper L2 copper Bottom layer L4 copper FR 4 dielectric FR 4 dielectric FR 4 dielectric PCB stack up structure Figure 38 Top layer layout and stack up structure of the u blox host PCB for the ANT pad of the module As illustrated on the left side of Figure 38 the antenna RF...

Page 64: ...male connector mounted on the top layer consisting in the cellular RF input output of the host PCB for external antenna and or RF coaxial cable access with board layout illustrated in Figure 41 Guidelines to design a proper equivalent 50 termination on a host printed circuit board are available in section 2 4 1 3 with antenna selection and design guidelines available in section 2 4 2 1 Top layer L...

Page 65: ...ines for applications with a passive antenna If a GNSS passive antenna with high gain and good sky view is used together with a short 50 line between antenna and receiver and no jamming sources affect the GNSS passive antenna the circuit illustrated in Figure 42 can be used This provides the minimum BoM cost and minimum board space SARA R510M8S 31 ANT_GNSS GND Figure 42 Minimum circuit with GNSS p...

Page 66: ...an integrated SAW filter and LNA as illustrated in Figure 4 The addition of such external components should be carefully evaluated especially in case the application power consumption should be minimized since the LNA alone requires an additional supply current of typically 5 to 20 mA Moreover the first LNA of the input chain will dominate the receiver noise performance therefore its noise figure ...

Page 67: ... GLONASS Tallysman TW3710P Passive antenna GPS SBAS QZSS GLONASS Galileo BeiDou Taoglas CGGBP 35 3 A 02 Ceramic patch antenna GPS SBAS QZSS GLONASS Galileo BeiDou Taoglas CGGBP 18 4 A 02 Embedded patch antenna GPS SBAS QZSS GLONASS Galileo BeiDou Inpaq PA1590MF6G Patch antenna GPS SBAS QZSS GLONASS Yageo ANT2525B00BT1516S Ceramic patch antenna GPS SBAS QZSS GLONASS Antenova SR4G008 Sinica Ultra lo...

Page 68: ...ESD Figure 44 Typical circuit with active antenna connected to GNSS RF interface of SARA R510M8S using an external supply Reference Description Part number Manufacturer L 120 nH wire wound RF Inductor 0402 5 110 mA LQW15ANR12J00 Murata C 100 nF capacitor ceramic X7R 0402 10 16 V GCM155R71C104KA55 Murata Rbias 33 ohm resistor 0 5W Various manufacturers Table 26 Example component values for active a...

Page 69: ...ference where a radio receiver is unable to detect a weak signal that it might otherwise be able to receive when there is no interference see Figure 45 Good blocking performance is particularly important in the scenarios where a number of radios of various forms are used in close proximity to each other 0 120 60 1575 Frequency MHz Power dBm Filter gain dB 1800 2025 1350 1125 GNSS signal LTE signal...

Page 70: ...L1 values are calculated according to the formula 𝑓 1 2 𝜋 𝐶 𝐿 For example a notch filter at 787 MHz improves the GNSS immunity to LTE band 13 high channel Suitable component nominal values are C1 3 3 pF and L1 12 nH with tolerance less than or equal to 2 to ensure adequate notch frequency accuracy Out band interference is caused by signal frequencies that are different from the GNSS the main sourc...

Page 71: ...ellular RF input output in case enough isolation between the cellular and the GNSS RF systems cannot be provided by proper selection and placement of the antennas beside other proper RF design solutions Manufacturer Part number Description Qualcomm B8636 GPS SBAS QZSS GLONASS Galileo BeiDou RF band stop SAW filter with low attenuation in Cellular frequency ranges Qualcomm B8666 GPS SBAS QZSS GLONA...

Page 72: ...urata C4 22 pF capacitor Ceramic C0G 0402 5 25 V GCM1555C1H270JA16 Murata L3 68 nH multilayer inductor 0402 SRF 1 GHz LQG15HS68NJ02 Murata R2 15 k resistor for diagnostics Generic manufacturer Table 30 Suggested parts for antenna detection circuit on application PCB and diagnostic circuit on antennas assembly The antenna detection and diagnostic circuit suggested in Figure 48 and Table 30 are here...

Page 73: ...built in DC load resistor of 15 k Using the UANTR AT command the module reports the resistance value evaluated from the antenna connector provided on the application board to GND Reported values close to the used diagnostic resistor nominal value i e values from 13 k to 17 k if a 15 k diagnostic resistor is used indicate that the antenna is correctly connected Values close to the measurement range...

Page 74: ... the ANT_DET line must be placed as ESD protection The additional high pass filter C3 and L2 on the ANT line is placed as ESD immunity improvement SARA module C2 R1 D1 C1 L1 J1 C3 L2 Figure 49 Suggested layout for antenna detection circuit on application board 2 4 6 Cellular antenna dynamic tuning control interface SARA R5 series modules support a wide range of frequencies from 600 MHz to 2200 MHz...

Page 75: ...equency band Aperture tuning optimizes radiation efficiency insertion loss isolation and rejection levels of the antenna SARA R5 series 56 ANT GND U1 34 I2S_WA 35 I2S_TXD Z2 L1 C1 C2 L2 Z1 Z3 b SARA R5 series 56 ANT GND U1 34 I2S_WA 35 I2S_TXD Z1 Z2 L1 C1 C2 L2 a Figure 50 Examples of schematics for cellular antenna dynamic impedance tuning a and aperture tuning b Refer to the antenna datasheet an...

Page 76: ... for applications requiring a change of SIM card during the product lifetime A SIM card holder can have 6 or 8 positions if a mechanical card presence detector is not provided or it can have 6 2 or 8 2 positions if two additional pins relative to the normally open mechanical switch integrated in the SIM connector for the mechanical card presence detection are provided Select a SIM connector provid...

Page 77: ...der Provide a very low capacitance i e less than 10 pF ESD protection e g Tyco PESD0402 140 on each externally accessible SIM line close to each relative pad of the SIM connector ESD sensitivity rating of the SIM interface pins is 1 kV HBM So that according to EMC ESD requirements of the custom application higher protection level can be required if the lines are externally accessible on the applic...

Page 78: ...m allowed rise time on the lines SARA R5 series 41 VSIM 39 SIM_IO 38 SIM_CLK 40 SIM_RST SIM CHIP SIM chip bottom view contacts side C1 VPP C6 VCC C1 IO C7 CLK C3 RST C2 GND C5 C2 C3 C5 U1 C4 2 8 3 6 7 1 C1 C5 C2 C6 C3 C7 C4 C8 8 7 6 5 1 2 3 4 Figure 52 Application circuits for the connection to a single Surface Mounted SIM chip with SIM detection not implemented Reference Description Part number M...

Page 79: ... sensitivity rating of SIM interface pins is 1 kV HBM according to JESD22 A114 so that according to the EMC ESD requirements of the custom application higher protection level can be required if the lines are externally accessible Limit capacitance and series resistance on each SIM signal to match the requirements for the SIM interface regarding maximum allowed rise time on the lines SARA R5 series...

Page 80: ...alog inputs In the second case the same harmonics can be picked up and create self interference that can reduce the sensitivity of LTE receiver channels and or GNSS channels for SARA R510M8S modules whose carrier frequency is coincidental with harmonic frequencies It is strongly recommended to place the RF bypass capacitors suggested in Figure 51 Figure 52 and Figure 53 near the SIM connector In a...

Page 81: ...cation processor DTE is used then it is recommended to connect the 1 8 V UART of the module DCE by means of appropriate unidirectional voltage translators using the module V_INT output as 1 8 V supply for the voltage translators on the module side as described in Figure 55 4 V_INT TxD Application Processor 3 0V DTE RxD RTS CTS DTR DSR RI DCD GND SARA R5 series 1 8V DCE 12 TXD 9 DTR 13 RXD 10 RTS 1...

Page 82: ... V DTE If a 3 0 V application processor DTE is used then it is recommended to connect the 1 8 V UART interface of the module DCE by means of appropriate unidirectional voltage translators using the module V_INT output as 1 8 V supply for the voltage translators on the module side as described in Figure 57 given that the DTE will behave correctly regardless of the DSR input setting 4 V_INT TxD Appl...

Page 83: ...rcuit with 5 wire link in DTE DCE serial communication 1 8V DTE If a 3 0 V application processor DTE is used then it is recommended to connect the 1 8 V UART interface of the module DCE by means of an appropriate unidirectional voltage translator using the module V_INT output as 1 8 V supply for the voltage translator on the module side as in Figure 59 4 V_INT TxD Application Processor 3 0V DTE Rx...

Page 84: ...ng the module V_INT output as 1 8 V supply for the voltage translators on the module side as in Figure 61 4 V_INT TxD Application Processor 3 0V DTE RxD RTS CTS TxD RxD RTS CTS GND SARA R5 series 1 8V DCE 12 TXD TxD1 9 DTR TxD2 13 RXD RxD1 10 RTS RTS1 11 CTS CTS1 8 DCD RxD2 6 DSR RTS2 7 RI CTS2 GND 1V8 B1 A1 GND U1 B3 A3 VCCB VCCA Unidirectional voltage translator C1 C2 3V0 DIR3 DIR2 OE DIR1 VCC B...

Page 85: ...1 8V DTE RxD RTS CTS DTR DSR RI DCD GND SARA R5 series 1 8V DCE 12 TXD 9 DTR 13 RXD 10 RTS 11 CTS 6 DSR 7 RI 8 DCD GND 0Ω TP 0Ω TP 0Ω TP TP Figure 62 1 UART interface application circuit with 3 wire link in DTE DCE serial communication 1 8 V DTE If a 3 0 V application processor DTE is used then it is recommended to connect the 1 8 V UART interface of the module DCE by means of an appropriate unidi...

Page 86: ...CD RxD2 6 DSR RTS2 7 RI CTS2 GND 0Ω TP 0Ω TP UART1 UART2 0Ω TP 0Ω TP Figure 64 2 UART interfaces application circuit with 3 wire links in DTE DCE serial communications 1 8 V DTE If a 3 0 V application processor DTE is used then it is recommended to connect the 1 8 V UART interfaces of the module DCE by means of an appropriate unidirectional voltage translator using the module V_INT output as 1 8 V...

Page 87: ...on for the appropriate selection of the resistance value for the external pull up biased by the application processor supply rail It is highly recommended to provide accessible test points directly connected to the TXD and RXD pins for FW upgrade purpose and to DCD and DTR pins for diagnostic purpose in particular providing a 0 series jumper on each line to detach each pin of the module from the D...

Page 88: ...A114F Higher protection level could be required if the lines are externally accessible and it can be achieved by mounting a very low capacitance i e less or equal to 1 pF ESD protection e g the Littelfuse PESD0402 140 ESD protection on the lines connected to these pins close to accessible points 2 6 2 2 Guidelines for USB layout design USB_D USB_D lines should be designed with differential charact...

Page 89: ...ng an ESD protection e g EPCOS CA05P4S14THSG varistor close to accessible points Connection with u blox 1 8 V GNSS receivers Communication with an external GNSS receiver is not supported by SARA R510M8S modules Figure 67 shows a circuit example for connecting the cellular module to a u blox 1 8 V GNSS receiver The SDA and SCL pins of the cellular module are directly connected to the related pins o...

Page 90: ... tolerant up to 3 0 V the connection to the related I2C pins of the u blox 3 0 V GNSS receiver must be provided using a suitable I2C bus bidirectional voltage translator e g TI TCA9406 which additionally provides the partial power down feature so that the GNSS 3 0 V supply can be ramped up before the V_INT 1 8 V cellular supply External pull up resistors are not needed on the cellular module side ...

Page 91: ...pacitor See GNSS receiver hardware integration manual U2 I2C bus bidirectional voltage translator TCA9406DCUR Texas Instruments U3 Generic unidirectional voltage translator SN74AVC4T774 12 Texas Instruments Table 43 Components for connecting SARA R500S SARA R510S modules to a u blox 3 0 V GNSS receiver For additional guidelines regarding Cellular and GNSS RF coexistence see section 2 4 4 For addit...

Page 92: ...pplication circuit for network indication provided over GPIO1 Table 44 Components for network indication application circuit Use transistors with at least an integrated resistor in the base pin or otherwise put a 10 k resistor on the board in series to the GPIO of SARA R5 series modules Do not apply voltage to any GPIO of the module before the switch on of the GPIOs supply V_INT to avoid latch up ...

Page 93: ...diate digital frequency harmonics which can produce electro magnetic interference that affects the module analog parts and RF circuits performance Implement suitable countermeasures to avoid any possible electro magnetic compatibility issue Make sure that the module is placed in order to keep the antenna or antennas for SARA R510M8S as far as possible from VCC supply line and related parts refer t...

Page 94: ...dering paste is 150 m according to application production process requirements K M1 M1 M2 E G H J E ANT pin B Pin 1 K G H J A D D O O L N L I F F K M1 M1 M2 E G H J E ANT pin B Pin 1 K G H J A D D O O L N L I F F Stencil 150 µm Figure 70 SARA R5 series modules suggested footprint and paste mask application board top view Parameter Value Parameter Value Parameter Value A 26 0 mm G 1 10 mm K 2 75 mm...

Page 95: ...I2S_WA 35 I2S_TXD 37 I2S_RXD 12 TXD 13 RXD 8 DCD 10 RTS 11 CTS 9 DTR 6 DSR 7 RI TP TP TXD RXD DCD RTS CTS DTR DSR RI 1 8 V DTE GND GND 0Ω 0Ω 47pF SIM CARD HOLDER VCC C1 VPP C6 IO C7 CLK C3 RST C2 GND C5 47pF 47pF 100nF 41 VSIM 39 SIM_IO 38 SIM_CLK 40 SIM_RST 47pF SW1 SW2 4 V_INT 42 GPIO5 470k ESD ESD ESD ESD ESD ESD 1k TP V_INT ANT_GNSS 31 GNSS antenna 24 GPIO3 V_INT B1 A1 B2 A2 VCCB VCCA SN74AVC4...

Page 96: ...s for diagnostic purposes Capacitance and series resistance must be limited on each SIM signal to match the SIM specifications Insert the suggested pF capacitors on each SIM signal and low capacitance ESD protections if accessible Check UART signals direction considering the modules signal names follow the ITU T V 24 recommendation 5 Provide accessible test points directly connected to the TXD and...

Page 97: ...C pins in particular if the application device integrates an internal antenna Ensure an optimal grounding connecting each GND pin with application board solid ground layer Use as many vias as possible to connect the ground planes on multilayer application board providing a dense line of vias at the edges of each ground area in particular along RF and high speed lines Keep routing short and minimiz...

Page 98: ... Protective Area EPA The EPA can be a small working station or a large manufacturing area The main principle of an EPA is that there are no highly charging materials near ESD sensitive electronics all conductive materials are grounded workers are grounded and charge build up on ESD sensitive electronics is prevented International standards are used to define typical EPA and can be obtained for exa...

Page 99: ...se control of the temperature and all parts will be heated up evenly regardless of material properties thickness of components and surface color Consider the IPC 7530A Guidelines for temperature profiling for mass soldering reflow and wave processes Reflow profiles are to be selected according to the following recommendations Failure to observe these recommendations can result in severe damage to ...

Page 100: ...Typical lead free 100 soldering profile 50 50 Elapsed time s Figure 72 Recommended soldering profile The modules must not be soldered with a damp heat process 3 3 3 Optical inspection After soldering the module inspect it optically to verify that it is correctly aligned and centered 3 3 4 Cleaning Cleaning the modules is not recommended Residues underneath the modules cannot be easily removed with...

Page 101: ... R5 series module already populated on it Performing a wave soldering process on the module can result in severe damage to the device u blox gives no warranty for damages to the SARA R5 series modules caused by performing more than a total of two soldering processes one reflow soldering process to mount the SARA R5 series module plus one wave soldering process to mount other THT parts on the appli...

Page 102: ...uld be sufficient to provide optimum immunity to interference and noise u blox gives no warranty for damages to the cellular modules caused by soldering metal cables or any other forms of metal strips directly onto the EMI covers 3 3 12 Use of ultrasonic processes The cellular modules contain components which are sensitive to ultrasonic waves Use of any ultrasonic processes cleaning welding etc ma...

Page 103: ...e whole application device and on the network operators where the device is intended to operate Table 46 summarizes the main approvals planned for SARA R5 series modules Certification SARA R500S 00B SARA R510S 00B SARA R510M8S 00B PTCRB LTE Cat M1 bands 1 2 3 4 5 8 12 13 18 19 20 25 26 28 LTE Cat M1 bands 1 2 3 4 5 8 12 13 18 19 20 25 26 28 LTE Cat M1 bands 1 2 3 4 5 8 12 13 18 19 20 25 26 28 GCF ...

Page 104: ...e host application device manufacturer SARA R5 series modules are certified according to all capabilities and options stated in the Protocol Implementation Conformance Statement document PICS of the module The PICS according to the 3GPP TS 36 521 2 13 and 3GPP TS 36 523 2 14 is a statement of the implemented and supported capabilities and options of a device The PICS document of the host device in...

Page 105: ... expressly approved by u blox could void the user s authority to operate the equipment Manufacturers of mobile or fixed devices incorporating SARA R5 series modules are authorized to use the FCC Grants of the SARA R5 series modules for their own final host products according to the conditions referenced in the certificates Manufacturers of mobile or fixed devices incorporating SARA R5 series modul...

Page 106: ...ce ISED Canada formerly known as IC Industry Canada Certification Number 8595A UBX19KM01 4 3 1 Declaration of Conformity This device complies with the ISED Canada license exempt RSS standard s Operation is subject to the following two conditions this device may not cause harmful interference this device must accept any interference received including interference that may cause undesired operation...

Page 107: ...ll bear a second label stating Contains IC 8595A UBX19KM01 Innovation Science and Economic Development Canada ISED Notices This Class B digital apparatus complies with Canadian CAN ICES 3 B NMB 3 B Operation is subject to the following two conditions o this device may not cause interference o this device must accept any interference including interference that may cause undesired operation of the ...

Page 108: ...ogué pour l utilisation au Canada Pour consulter l entrée correspondant à l appareil dans la liste d équipement radio REL Radio Equipment List d Industrie Canada rendez vous sur http www ic gc ca app sitt reltel srch nwRdSrch do lang fra Pour des informations supplémentaires concernant l exposition aux RF au Canada rendez vous sur http www ic gc ca eic site smt gst nsf fra sf08792 html IMPORTANT l...

Page 109: ...e operating configurations o 7 4 dBi in 700 MHz i e LTE FDD 28 band o 8 2 dBi in 800 MHz i e LTE FDD 20 band o 8 4 dBi in 900 MHz i e LTE FDD 8 band o 11 3 dBi in 1800 MHz i e LTE FDD 3 band o 11 8 dBi in 2100 MHz i e LTE FDD 1 band The conformity assessment procedure for the SARA R5 series modules referred to in Article 17 and detailed in Annex II of Directive 2014 53 EU has been followed Thus th...

Page 110: ...es Functional tests serial interface communication SIM card communication Digital tests GPIOs and other interfaces Measurement and calibration of RF characteristics in all supported bands such as receiver S N verification frequency tuning of the reference clock calibration of transmitter and receiver power levels etc Verification of the RF characteristics after calibration i e modulation accuracy ...

Page 111: ... supply It is also a mean to verify if components at the cellular RF interface are well soldered The GNSS RF functionality should be checked with the device under test DUT placed in an outdoor position with excellent sky view HDOP 3 0 Let the receiver acquire satellites and compare the signal strength with a Golden Device As the electro magnetic field of a redistribution antenna is not homogenous ...

Page 112: ...sibilities for the inappropriate use of this feature Figure 74 illustrates a typical test setup for such an RF functional test Applicationboard SARA R5 series ANT Application Processor AT commands Cellular antenna Spectrum analyzer or Power meter IN Wideband antenna TX Applicationboard SARA R5 series Application Processor AT commands Signal generator OUT Wideband antenna RX ANT Cellular antenna Fi...

Page 113: ...e ratio C2PC Class II Permissive Change C4PC Class IV Permissive Change Cat Category CE European Conformity CMOS Complementary Metal Oxide Semiconductor CoAP Constrained Application Protocol CTS Clear To Send DC Direct Current DCD Data Carrier Detect DCE Data Communication Equipment DDC Display Data Channel interface DL Down Link Reception DRX Discontinuous Reception DSR Data Set Ready DTE Data Te...

Page 114: ...hnical Commission IoT Internet of Things IP Internet Protocol IPC Institute of Printed Circuits ISED Innovation Science and Economic Development Canada ISO International Organization for Standardization LDO Low Dropout LED Light Emitting Diode LGA Land Grid Array LNA Low Noise Amplifier LPWA Low Power Wide Area LTE Long Term Evolution LwM2M Open Mobile Alliance Lightweight Machine to Machine proto...

Page 115: ...igital Input Output SIM Subscriber Identification Module SMA Sub Miniature version A SMD Surface Mounting Device SMS Short Message Service SMT Surface Mount Technology SP4T Single Pole 4 Throws SPI Serial Peripheral Interface SQI Serial Quad Input Output SRF Self Resonant Frequency TBD To Be Defined TCP Transmission Control Protocol TCXO Temperature Controlled Crystal Oscillator THT Through Hole T...

Page 116: ...chnique https www gsma com newsroom wp content uploads TS 09 v10 2 pdf 12 3GPP TS 36 521 1 Evolved Universal Terrestrial Radio Access User Equipment conformance specification Radio transmission and reception Part 1 Conformance Testing 13 3GPP TS 36 521 2 Evolved Universal Terrestrial Radio Access E UTRA User Equipment conformance specification Radio transmission and reception Part 2 Implementation...

Page 117: ... power off reset sections updated Other minor corrections and clarifications R03 15 Jul 2020 sses fvid Updated SARA R5 series modules product status Revised certification approval info Added antenna trace design used for SARA R5 series modules type approvals Revised GPIO description section Revised VCC Antennas GNSS UART USB I2C GPIO design in guidelines Other minor corrections and clarifications ...

Page 118: ...ox com Regional Office China Beijing Phone 86 10 68 133 545 E mail info_cn u blox com Support support_cn u blox com Regional Office China Chongqing Phone 86 23 6815 1588 E mail info_cn u blox com Support support_cn u blox com Regional Office China Shanghai Phone 86 21 6090 4832 E mail info_cn u blox com Support support_cn u blox com Regional Office China Shenzhen Phone 86 755 8627 1083 E mail info...

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