NINA-W1 series - System integration manual
UBX-17005730 - R15
Revision history
Page 53 of 54
C1 - Public
Revision
Date
Name
Comments
R12
18-Dec-2020
flun
Upgraded document status for NINA-W106 to Early Production Information
in Applicable products
Clarified ethernet startup precautions in section 1.7.2. Clarified the need for
4.7 k
Ω
pull up to RMII_CRSDV and 10
Ω
series resistors for all RMII/SMI pins in
section 1.7.2 and 3.4.2.
Added section 1.4.2 on low power modes with LPO.
Added SPI for NINA-W13 to figure 1.
R13
4-Feb-2021
flun
Updated document to Advanced information for NINA-W156. Clarified LPO in
section 1.4.2.
R14
3-Sep-2021
lkis
Section 1.7.2.1: Added time window of availability of RMII_CLK during boot.
Section 2.4: Module re-programming via UART requirement added.
R15
27-Oct-2021
ldas, lkis
Changed document status for NINA-W156 to Early Production Information.
Updated
NINA-W10 OTP and production information
. Remove legacy ESP
IDF instructions. Included instructions on how to set and use partition table.
Updated reflow soldering cycle to two in
. Updated the NINA-W10 series block diagram with the NINA-W10
64 Mbit version in
. Revised information and instructions for
updating NINA-W13 and NINA-W15
information,
including the removal of the earlier requirements for bow and twist on bare
PCBs. Revised maximum ESD sensitivity in