TOBY-L1 and MPCI-L1 series - System Integration Manual
UBX-13001482 - R04
Advance Information
System description
Page 9 of 90
1.2
Architecture
Cellular
Base-band
Processor
Memory
Power Management Unit
26 MHz
32.768 kHz
ANT1
RF
Transceiver
ANT2
V_INT (I/O)
V_BCKP
VCC (Supply)
SIM
USB
GPIO *
Power On
External Reset
PA
LNA
Filter
Filter
Duplexer
Filter
PA
LNA
Filter
Filter
Duplexer
Filter
LNA
Filter
Filter
LNA
Filter
Filter
Switch
Switch
Figure 1: TOBY-L100 block diagram
* = GPIOs are not supported by initial FW release.
ANT1
SIM
USB
LED_WWAN#
TOBY-L1
series
Signal
Conditioning
ANT2
W_DISABLE#
PERST#
U.FL
U.FL
3.3Vaux (Supply)
Boost
Converter
VCC
Figure 2: MPCI-L100 block diagram