LISA-U1 series - System Integration Manual
3G.G2-HW-10002-3
Preliminary
System description
Page 35 of 125
VCC
V_BCKP
PWR_ON
V_INT
Internal Reset
System State
BB Pads State
Internal Reset
→
Operational Operational
Tristate / Floating Internal Reset
OFF
ON
*
Start-up
event
0 ms
~5 ms ~6 ms
~35 ms
~1000 ms
PWR_ON
can be set high
Start of interface
configuration
All interfaces
are configured
Figure 17: LISA power on sequence description (* - the PWR_ON signal state is not relevant during this phase)
The Internal Reset signal is not available on a module pin.