AMY-6M - Hardware Integration Manual
UBX-17021971 – R07
Design-in
Page 22 of 57
Figure 16: Connecting to SPI Host/Master
With AMY-6M the SPI MOSI, MISO and SCK pins share a configuration function at start up. Afterwards the
SPI function will not affect the configuration pins. This might be difficult in case several slaves are
connected to the host. In this case the problem can be solved as shown in Figure 17 by making sure the
SS_N is high when the receiver starts up.
The SPI signals at AMY-6M are at with VDD_IO voltage levels. VDD_IO must be supplied with the same
voltage as the host processor.
TX ready signal (data ready to be picked up) can be configured, see 2.4.1.3.
2.3.4.4
Pin configuration with module as one of several slaves
Figure 17: Diagram of SPI Pin Configuration
Component
Description
Model
Supplier
U
1
– U
3
Buffer
NC7SZ125
Fairchild
Figure 18: Recommended components for SPI pin configuration
Use same power voltage to supply U
1
– U
3
and VDD_IO.
