u-blox SARA-G3 Series, System Integration Manual

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SARA-G3 series - System Integration Manual
UBX-13000995 - R06 Objective Specification Design-in
Page 150 of 218
2.7 General Purpose Input/Output (GPIO)
2.7.1.1 Guidelines for GPIO circuit design
The following application circuits are suggested as a general guideline for the usage of the GPIO pins
available with the SARA-G350 modules, according to the relative custom function.
 Network status indication :
The pin configured to provide the “Network status indication” function, e.g. the GPIO1 , can be
connected on the application board to an input pin of an application processor or can drive a LED by
a transistor with integrated resistors to indicate network status.
 GSM Tx burst indication :
The GPIO1 pin, as configured to provide the “GSM Tx burst indication” function, can be connected
on the application board to an input pin of an application processor to indicate when a GSM Tx
burst/slot occurs.
 GNSS supply enable :
The pin configured to provide the “GNSS supply enable” function ( GPIO2 by default) has to be
connected to the active-high enable pin (or the active-low shutdown pin) of the voltage regulator
that supplies the u-blox GNSS receiver.
 GNSS data ready :
The GPIO3 pin, by default configured to provide the “GNSS data ready” function, has to be
connected to the data ready output of the u-blox GNSS receiver (i.e. the pin TXD1).

GNSS RTC sharing :
The GPIO4 pin, by default configured to provide the “GNSS RTC sharing” function, has to be
connected to the RTC synchronization input of the u-blox GNSS receiver (i.e. the pin EXTINT0).
Figure 61Figure 61 describes an application circuit for a typical usage of the GPIOs of SARA-G350
modules:

Network indication function provided by the GPIO1 pin

GNSS supply enable function provided by the GPIO2 pin
 GNSS data ready function provided by the GPIO3 pin
 GNSS RTC sharing function provided by the GPIO4 pin
Use transistors with at least an integrated resistor in the base pin or otherwise put a 10 k
Ω
resistor
on the board in series to the GPIO.
ESD sensitivity rating of the GPIO pins is 1 kV (Human Body Model according to JESD22-A114).
Higher protection level could be required if the lines are externally accessible on the application
board. Higher protection level can be achieved by mounting an ESD protection (e.g. EPCOS
CA05P4S14THSG varistor array) close to accessible points.
Any external signal connected to the GPIOs must be tri-stated or set low when the module is in
power-down mode and during the module power-on sequence (at least until the activation of the
V_INT supply output of the module), to avoid latch-up of circuits and allow a proper boot of the