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TE0726 TRM 

Revision: V.3 

Copyright © 2017 Trenz Electronic GmbH

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http://www.trenz-electronic.de

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Ultra-low capacitance double rail-to-rail ESD protection diode ,U4

Micro-USB 2.0 B receptacle, J1

Green LED (GLED), D1

Red LED (RLED), D2

DSI LCD connector, J4

JTAGENB, when low, TDO, TDI, TMS and TCK function as GPIOs, J15

Fiducial mark PM2

External I C bus with interrupt signal and power line, J2

2

Low-voltage 4-channel I C and SMBus multiplexer with interrupt logic, U10

2

2x20 pin 2.54 GPIO header, J8

128 Mbit (16 MByte) 3.0V SPI Flash memory, U5

USB 2.0 Hub and 10/100 Ethernet controller, U2

External reset

2 Kbit Microwire compatible serial EEPROM, U9

PUDC of Zynq, active low enables internal pull-ups during configuration on all SelectIO pins

Dual USB A receptacle, J12. Also fiducial mark PM1

Dual USB A receptacle, J11

Low power programmable oscillator @ 25.000000 MHz, U13

Molex’s miniature traceability S/N pad for low-cost, unique product identification

RJ-45 Ethernet connector with 10/100 integrated magnetics, J10. Also fiducial mark PM3

3.5mm RCA audio jack, J7

1A PowerSoC synchronous buck regulator with integrated inductor (3.3V), U20

1A PowerSoC synchronous buck regulator with integrated inductor (1.8V), U19

ZIF FFC/FPC CSI-2 camera connector, J3

HDMI connector, J6

Common mode filter with ESD protection, D8

Common mode filter with ESD protection, D9

1A PowerSoC synchronous buck regulator with integrated inductor (1.35V), U16

Additional ex5V power supply connector, J5

Highly integrated full featured hi-speed USB 2.0 ULPI transceiver, U18

Low-power programmable oscillator @ 33.333333 MHz, U14

Ultra-low supply current voltage monitor with optional watchdog, U22

Fiducial mark PM4

Micro SD memory card connector with detect switch, J9

JTAG interface, TP1 (TDI), TP3 (TDO), TP5 (TCK), TP7 (TMS)

1A PowerSoC synchronous buck regulator with integrated inductor (1.0V), U17

Fiducial mark PM6

0.5A dual channel current-limited power switch, U15

0.5A dual channel current-limited power switch, U21

Fiducial mark PM5

Initial Delivery State

Up on delivery from Trenz Electronic System Controller CPLD is programmed with the standard firmware 

and FTDI FT2232H EEPROM contains pre-programmed Digilent license needed by Xilinx software tools for 

JTAG access, all other programmable devices are empty.

Summary of Contents for TE0726

Page 1: ...TE0726 TRM Date Revision V 3 29 May 2017 09 02 ...

Page 2: ... _________________________________________________________________ 12 4 Channel I2C Multiplexer _____________________________________________________________ 13 Boot Process ________________________________________________________________________ 14 Power and Power On Sequence _________________________________________________________ 15 Power Supply ________________________________________________...

Page 3: ...10 SoC XC7Z010 System on Chip with up to 512 MByte DDR3L SDRAM 4 x USB 2 0 ports 10 100 Mbit Ethernet port and 16 MByte Flash memory Key Features Xilinx Zynq XC7Z010 1CLG225C REV3 DDR3L SDRAM 512 MByte REV2 DDR3L SDRAM 128 512 MByte REV1 LPDDR2 SDRAM 64 MByte 16 MByte Flash Raspberry Pi Model 2 form factor LAN9514 USB hub with 10 100 Ethernet 4 x USB 2 0 with power switches 10 100 Mbit Ethernet RJ...

Page 4: ...TE0726 TRM Revision V 3 Copyright 2017 Trenz Electronic GmbH Page of 4 21 http www trenz electronic de Block Diagram ...

Page 5: ...de 1 2 3 4 5 6 Main Components Xilinx Zynq XC7Z010 All Programmable SoC U1 512 MByte DDR3L SDRAM U8 Lattice Semiconductor MachXO2 System Controller CPLD U11 Dual high speed USB to multipurpose UART FIFO U3 2 Kbit Microwire compatible serial EEPROM U6 Low power programmable oscillator 12 000000 MHz U7 ...

Page 6: ...ith 10 100 integrated magnetics J10 Also fiducial mark PM3 3 5mm RCA audio jack J7 1A PowerSoC synchronous buck regulator with integrated inductor 3 3V U20 1A PowerSoC synchronous buck regulator with integrated inductor 1 8V U19 ZIF FFC FPC CSI 2 camera connector J3 HDMI connector J6 Common mode filter with ESD protection D8 Common mode filter with ESD protection D9 1A PowerSoC synchronous buck re...

Page 7: ... 34 P14 CSI_D1_N CSI 2 camera connector J3 34 N11 CSI_C_P CSI 2 camera connector J3 34 N12 CSI_C_N CSI 2 camera connector J3 Display Serial Interface DSI The TE0726 03 module has MIPI Alliance DSI specification compatible serial display interface routed from Zynq SoC bank 35 to the connector J4 FPGA Bank Zynq Pin Signal Name Connected To 35 F13 DSI_D0_R_N DSI display connector J4 35 F14 DSI_D0_R_P...

Page 8: ...34 P10 HDMI_TX1_P HDMI connector J6 via EMI filter ESD protector 34 R11 HDMI_TX2_N HDMI connector J6 via EMI filter ESD protector 34 P11 HDMI_TX2_P HDMI connector J6 via EMI filter ESD protector 34 R7 HDMI_TXC_N HDMI connector J6 via EMI filter ESD protector 34 R8 HDMI_TXC_P HDMI connector J6 via EMI filter ESD protector Audio Output Pulse width modulated stereo audio output is routed from Zynq So...

Page 9: ...ontroller CPLD pin 17 GPIO to Header J8 Interface Mapping GPIO Zynq Pin J8 Pin GPIO Zynq Pin J8 Pin GPIO2 K15 3 GPIO15 N13 10 GPIO3 J14 5 GPIO16 L13 36 GPIO4 H12 7 GPIO17 G11 11 GPIO5 N14 29 GPIO18 H11 12 GPIO6 R15 31 GPIO19 R12 35 GPIO7 L14 26 GPIO20 M14 38 GPIO8 L15 24 GPIO21 P15 40 GPIO9 J13 21 GPIO22 H13 15 GPIO19 H14 19 GPIO23 J11 16 GPIO11 J15 23 GPIO24 K11 18 GPIO12 M15 32 GPIO25 K13 22 GPI...

Page 10: ...PI0_DQ0 M0 Bi directional data line 0 3 SPI0_DQ1 M1 Bi directional data line 1 4 SPI0_DQ2 M2 Bi directional data line 2 5 SPI0_DQ3 M3 Bi directional data line 3 6 SPI0_SCK SPI clock 7 MIO7 RESETB of USB3320 chip U18 8 MIO8 System Controller CPLD pin 28 9 MIO9 System Controller CPLD pin 29 10 SD_D0 Serial data 0 11 SD_CMD Command Response 12 SD_CLK Serial clock 13 SD_D1 Serial data 1 14 SD_D2 Seria...

Page 11: ...I bi directional data bus 34 OTG DATA2 ULPI bi directional data bus 35 OTG DATA3 ULPI bi directional data bus 36 OTG CLK ULPI clock 37 OTG DATA5 ULPI bi directional data bus 38 OTG DATA6 ULPI bi directional data bus 39 OTG DATA7 ULPI bi directional data bus 48 MUX_SCL I C clock to I C MUX 2 2 49 MUX_SDA I C data to from I C MUX 2 2 52 MIO52 System Controller CPLD pin 20 53 MIO53 System Controller ...

Page 12: ... Mbps compatible Upstream port is connected to the SMSC USB3320 hi speed USB 2 0 ULPI transceiver which has full support for the optional On The Go OTG protocol High Performance 10 100 Ethernet controller integrated into the same LAN9514 IC is fully compliant with IEEE802 3 802 3u standards has integrated Ethernet MAC and PHY and supports both 10BASE T and 100BASE TX media 256 byte EEPROM is conne...

Page 13: ...lave I C channels which are 2 2 routed as follows Channel Connected To 0 Connector J8 pin 27 ID_SDA and pin 28 ID_SCL 1 DSI connector J4 pin 12 DSI_SDA and pin 11 DSI_SCL 2 HDMI connector J6 pin 16 SDA and pin 15 SCL 3 CSI 2 camera connector J3 pin 14 CSI_SDA and pin 13 CSI_SCL Each slave channel of TCA9544A has its own dedicated interrupt signal in order for the master to detect an interrupt on t...

Page 14: ...evices in CLG225 package do not support SD Card boot directly from ROM bootloader At least FSBL must be loaded from on board SPI Flash later all boot process can continue from SD Card The easiest solution is to let FSBL to load bitstream and u boot from SPI Flash and then let u boot to load Linux or any other OS image from SD Card ...

Page 15: ...here is no specific power on sequence except to achieve minimum current draw I Os should be 3 stated at power on Power Rails and Bank Voltages Rail Bank Name Voltage Notes VCCINT VCCINT 1 0V PL internal supply voltage VCCPINT VCCPINT 1 0V PS internal logic supply voltage VCCPLL VCCPLL 1 8V PS PLL supply VCCBATT_0 VCCBATT_0 1 8V VCCAUX VCCAUX 1 8V PL auxiliary supply voltage VCCPAUX VCCPAUX 1 8V PS...

Page 16: ...nts Currently in Production TE0726 Variant Zynq SoC RAM Flash Ethernet Temperature Range TE0726 03R XC7Z010 1CLG225C 128 MByte 16 MByte Commercial grade TE0726 03M XC7Z010 1CLG225C 512 MByte 16 MByte 10 100 Mbit Commercial grade TE0726 03 07S 1C XC7Z007S 1CLG225C 512 MByte 16 MByte 10 100 Mbit Commercial grade ...

Page 17: ...3 V Output voltage I of AP2152SG 13 LOAD Internal limited A Maximum continuous load current PS MIO input voltage 0 4 VCCO_MIO 0 55 V VCCO_MIO0_500 and VCCO_MIO1_501 PL Bank 34 I O input voltage 0 4 VCCO_34 0 55 V PL Bank 35 I O input voltage 0 4 VCCO_35 0 55 V Storage temperature 55 125 C See also the Xilinx datasheet DS187 for more information about absolute maximum ratings Recommended Operating ...

Page 18: ... for exact numbers Mating height with standard connectors 8 mm PCB thickness 1 6 mm Highest part on PCB approximately 2 5 mm Please download the step model for exact numbers All dimensions are shown in millimeters Additional sketches drawings and schematics can be found here Weight Variant Weight in g Note TE0726 03M Plain module TE0726 03R Plain module TE0726 03 07S 1C Plain module ...

Page 19: ...umentation Link 2016 05 06 03 TE0726 03 2016 01 26 02 TE0726 02 01 Hardware revision number is printed on the PCB board next to the module model number separated by the dash Document Change History Date Revision Contributors Description 2017 05 24 V 3 Jan Kumann Absolute maximum ratings Layout redesign 2017 05 24 V 2 John Hartfiel Weight 2017 05 24 V 1 Jan Kumann Initial version ...

Page 20: ...tation those resulting from lost profits lost data or business interruption arising out of the use inability to use or the results of use of this document any documents linked to this document or the materials or information contained at any or all such documents If your use of the materials or information from this document results in the need for servicing repair or correction of equipment or da...

Page 21: ...Directive 2002 96 EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment WEEE Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately By the 13 August 2005 M...

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