TQ TQMaRZG2x, User Manual

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User's Manual l TQMaRZG2x UM 0100 l © 2021, TQ-Systems GmbH Page 18
3.4 Data interfaces
In general all RZ/G2x IO pins, partly also the memory interface, are provided at the TQMaRZG2x connectors.
The following chapters describe the RZ/G2x interfaces that are provided by the TQMaRZG2x in connection with the MBaRZG2x.
The interfaces are set as default in the described function and are directly routed to the TQMaRZG2x connectors.
Depending on multiplexing further, or other interfaces are possible.
3.4.1 Audio
The RZ/G2x provides up to ten audio interfaces (SSI modules).
Depending on the multiplexing, the following signals are primarily available.
Table 13: Audio signals
Signal TQMaRZG2x Power group
SSI_SDATA1_A X2-A64
3.3 V
SSI_SDATA0 X2-A65
SSI_SCK_0 X2-B69
SSI_WS_0 X2-A72
AUDIO_CLKOUT3 X2-A88
3.4.2 CAN
The RZ/G2x provides two CAN controllers that support CAN-FD.
Depending on the multiplexing, the following signals are primarily available.
Table 14: CAN signals
Signal TQMaRZG2x Power group
CAN0_TX X1-B79
3.3 V
CAN0_RX X1-B81
CAN1_TX X1-B53
CAN1_RX X1-B55
3.4.3 Clock
The RZ/G2x provides several clock inputs as well as outputs for different functions.
Depending on the multiplexing the following signals are primarily available.
Table 15: Clock signals
Signal TQMaRZG2x Power group Remark
DU_DOTCLK_IN2 X1-A45 1.8 V External clock input for DU clocks (PLL)
DU_DOTCLK_IN1 X1-A47 1.8 V External clock input for DU clocks (PLL)
DU_DOTCLK_IN0 X1-A49 1.8 V External clock input for DU clocks (PLL)
USB_EXTAL_CON X2-B45 1.8 V External clock input for USB PLL
EXTALR_CON X2-B50 1.8 V External clock input for RCLK
FSCLKST# X2-B52 1.8 V Clock output RZ/G2x
AUDIO_CLKB_A X2-B89 3.3 V External clock input for Audio PLL
AUDIO_CLKC_B X2-A79 3.3 V External clock input for Audio PLL