TQ TQMaRZG2x, User Manual

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User's Manual l TQMaRZG2x UM 0100 l © 2021, TQ-Systems GmbH Page 11
3.2 Boot source (continued)
Table 7: General boot settings
Boot config pin TQMaRZG2x Setting Remark
MDT1 X1-B56
JTAG section. More information in (1) and (2). Don’t care
MDT0 X1-B53
MD28 X1-A61
0 – RCLK from inside
1 – RCLK from EXTALR
1
MD27 X1-A62
00 – LPDDR4
Other settings are prohibited
00
MD22 X1-A68
MD26 X1-A64 Reserved, fixed to 0 0
MD25 X1-A65 Reserved, fixed to 0 0
MD23 X1-A67 Reserved, fixed to 0 0
MD21 X1-A74
JTAG section. More information in (1) and (2). Don’t care
MD20 X1-A72
MD11 X1-B65
MD10 X1-B75
MD19 X1-A75
00 – DDR3200
01 – DDR2800
10 – Setting prohibited
11 – DDR1600
00
MD17 X1-A77
MD18 X1-A76
0 – PLL1 division ratio: 1/24
1 – PLL1 division ratio: 1/36
0
MD16 X1-A78 Reserved, fixed to 1 1
MD15 X1-A79
0 – AArch32
1 – AArch64
0
MD14 X1-A81
EXTAL Select:
00 – 16.66 MHz
01 – 20.00 MHz
10 – 25.00 MHz
11 – 33.33 MHz
10
MD13 X1-A82
MD12 X1-B69
0 – PCIe
1 – SATA RZ/G2M – 0 (fixed)
RZ/G2H or N – don’t care
MD9 X1-B74
0 – Input of an external clock at EXTAL pin
1 – Connects the crystal to the EXTAL and XTAL pins
1
MD8 X1-B73
EXBUS Data Bus Width
0 – 8-bit
1 – 16-bit
Don’t care
MD7 X1-B72
00 – Cortex-A57 boot
01 – Cortex-A53 boot
10 – Setting prohibited
11 – Setting prohibited
00
MD6 X1-B71
MD5 X1-B68
0 – Setting prohibited
1 – Normal boot
1
MD0 X1-B62 Reserved, fixed to 0 0