User's Manual l TQMa8MxML UM 0103 l © 2022, TQ-Systems GmbH
Page 39
3.2.5.14
USB
The i.MX 8M Mini provides two USB 2.0 controllers (including USB 2.0 OTG).
USB1 is configured as USB OTG by default. The OTG signals use GPIO1 pins as shown in the block diagram.
USB2 is configured in such a way that USB 2.0 is used without OTG functionality, although an OTG configuration is possible.
The LGA pads of the OTG signals are available as GPIO pins when not in use.
USB_ID pins may only be connected with 1.8 V! USB_VBUS pins on the other hand with up to 5 V.
The i.MX 8M Nano offers only one USB interface (USB1), which is implemented as USB-OTG on the TQMa8MxNL.
If the TQMa8MxNL is used, the LGA pads of the USB2 signals, except for the OTG pins, should be terminated with 10 kΩ.
When using USB-OTG, it is recommended to use the OTG_ID signal instead of the regular ID signal.
The regular ID signal is available as placement option.
i.MX 8M Mini
LGA
USB2_ID
USB2_VBUS
USB2_DN/DP
USB2_ID
USB2_VBUS
USB2_DN/DP
GPIO1_IO13
GPIO1_IO12
GPIO1_IO10
USB1_VBUS
USB1_DN/DP
USB1_OTG_OC
USB1_OTG_PWR
USB1_OTG_ID
USB1_VBUS
USB1_DN/DP
USB1_ID
USB1_ID
GPIO1_IO15
GPIO1_IO14
GPIO1_IO11
USB2_OTG_OC
USB2_OTG_PWR
USB2_OTG_ID
Figure 19: Block diagram USB interfaces
The following table shows the signals used by the USB_OTG interfaces:
Table 31:
USB_OTG signals
Signal
Direction
CPU ball
TQMa8MxML
Power group
USB1_DN
I/O
A22
U19
V_3V3
USB1_DP
B22
V19
USB1_VBUS
P
F22
P16
USB1_ID
I
D22
N16
V_1V8_ANA
USB1_OTG_ID
I
AD10
J5
V_3V3
USB1_OTG_OC
I
AD9
H6
USB1_OTG_PWR
O
AB10
H5
USB2_DN
I/O
A23
V18
V_3V3
USB2_DP
B23
W18
USB2_VBUS
P
F23
R17
USB2_ID
I
D23
P17
V_1V8_ANA
USB2_OTG_ID
I
AC10
J6
V_3V3
USB2_OTG_OC
I
AB9
G6
USB2_OTG_PWR
O
AC9
G5
