User's Manual l TQMa8MxML UM 0103 l © 2022, TQ-Systems GmbH
Page 22
3.2.1.6.2
Boot device SD card
Table 13:
Boot configuration SD card at USDHC2
Fuse
Signal
TQMa8MxML
Setting
BOOT_CFG14
SAI1_TXD6
P4
Boot Device:
001: SD/eSD
BOOT_CFG13
SAI1_TXD5
N4
BOOT_CFG12
SAI1_TXD4
N2
BOOT_CFG11
SAI1_TXD3
M3
Port Selection:
00:
uSDHC1
01:
uSDHC2
10:
uSDHC3
BOOT_CFG10
SAI1_TXD2
M2
BOOT_CFG9
SAI1_TXD1
L3
Power Cycle Enable:
0:
No power cycle
1:
Enabled
BOOT_CFG8
SAI1_TXD0
L1
SD Loopback Clock Source:
0:
Through SD pad
1:
Direct
BOOT_CFG7
SAI1_RXD7
K4
Boot Speed:
0:
Normal/Regular Boot
1:
Fast Boot
BOOT_CFG4
SAI1_RXD4
H4
Bus Width:
0:
1 bit
1:
4 bit
BOOT_CFG3
SAI1_RXD3
H3
Speed Selection:
000: Normal / SDR12
001: High / SDR25
010: SDR50
011: SDR104
101: Reserved for DDR50
BOOT_CFG2
SAI1_RXD2
H1
BOOT_CFG1
SAI1_RXD1
G2
3.2.1.6.3
Boot device QSPI NOR
Table 14:
Boot configuration QSPI NOR at QSPI_A
Fuse
Signal
TQMa8MxML
Setting
BOOT_CFG14
SAI1_TXD6
P4
Boot Device:
100: QSPI
BOOT_CFG13
SAI1_TXD5
N4
BOOT_CFG12
SAI1_TXD4
N2
BOOT_CFG10
SAI1_TXD2
M2
Flash Type:
000: 3B read
001: 4B read
010: Hyperflash 1V8
011: Hyperflash 3V3
100: MXIC Octal DDR
BOOT_CFG9
SAI1_TXD1
L3
BOOT_CFG8
SAI1_TXD0
L1
BOOT_CFG7
SAI1_RXD7
K4
Hold Time:
00:
500 µsec
01:
1 msec
10:
3 msec
11:
10 msec
BOOT_CFG6
SAI1_RXD6
J3
