User's Manual l TQMa8MxML UM 0103 l © 2022, TQ-Systems GmbH
Page 16
TQMa8MxNL signals (continued)
TQMa8MxNL, signals (continued)
CPU ball
Signal
Group
Dir.
Level
TQMa8MxNL pad
–
GND
A5, A8, A11, A14, A16, B2, B5, B7, B10, B17, C5, C6, C8, C11, C15, C16, C18, D3, D4,
D5, D6, D7, D9, D12, D14, D17, E2, E3, E4, E5, E8, E10, E13, E15, E19, F3, F4, F5, F11,
F18, G3, G8, G15, G17, H2, H7, H19, J1, J4, J18, K3, K17, L2, L6, L19, M1, M4, M16,
M18, N3, N17, P2, R1, R5, R7, R16, T3, T6, T10, T13, T19, U4, U7, U11, U14, U18, V2,
V5, V7, V12, V15, V17, W4, W7, W11, W14
–
NC
F1, G1, G2, G4, G5, G6, H1, H3, H4, J2, J3, J6, K1, K2, K4, L1, L3, L4, M2, M3, N2, N4,
P17, P19, P3, P4, R17, R18, R19, T17, T18, U17, V18, W18
–
V_1V8
Power
P
out
1.8 V
N1
–
V_3V3
Power
P
out
P1
–
V_3V3_SD
Power
P
out
3.3 V
F6
–
V_5V_IN
Power
P
in
5 V
A2, A3, A4, B3, B4, C3, C4
H10
V_ECSPI
Power
P
in
1.8 / 3.3 V
A15
W22
V_ENET
Power
P
in
1.8 / 2.5 / 3.3 V
W12
–
V_LICELL
Power
P
in
3 V
D15
J12
V_UART
Power
P
in
1.8 / 3.3 V
B15
P23
QSPI_A_DATA0
QSPI
I/O
1.8 V
V10
K24
QSPI_A_DATA1
QSPI
I/O
1.8 V
U9
K23
QSPI_A_DATA2
QSPI
I/O
1.8 V
V9
N23
QSPI_A_DATA3
QSPI
I/O
1.8 V
W9
N22
QSPI_A_SCLK
QSPI
O
1.8 V
U12
N24
QSPI_A_SS0#
QSPI
O
1.8 V
U10
–
PMIC_RST#
Reset
I
1.8 V
E6
–
RESET_IN#
Reset
I
OD
E7
–
RESET_OUT#
Reset
O
F7
AD19
SAI2_MCLK
SAI
I/O
3.3 V
C1
AB22
SAI2_RXC
SAI
I
3.3 V
B1
AC24
SAI2_RXD
SAI
I
3.3 V
C2
AC19
SAI2_RXFS
SAI
I
3.3 V
D2
AD22
SAI2_TXC
SAI
O
3.3 V
D1
AC22
SAI2_TXD
SAI
O
3.3 V
E1
AD23
SAI2_TXFS
SAI
O
3.3 V
F2
AD6
SAI3_MCLK
SAI
I/O
3.3 V
A12
AG7
SAI3_RXC
SAI
I
3.3 V
A10
AF7
SAI3_RXD
SAI
I
3.3 V
B12
AG8
SAI3_RXFS
SAI
I
3.3 V
B11
AG6
SAI3_TXC
SAI
O
3.3 V
A13
AF6
SAI3_TXD
SAI
O
3.3 V
B14
AC6
SAI3_TXFS
SAI
O
3.3 V
B13
AD15
SAI5_MCLK
SAI
I/O
3.3 V
A7
AC15
SAI5_RXC
SAI
I
3.3 V
A6
AD18
SAI5_RXD0
SAI
I
3.3 V
A9
AC14
SAI5_RXD1
SAI
I
3.3 V
B9
AD13
SAI5_RXD2
SAI
I
3.3 V
B8
AC13
SAI5_RXD3
SAI
I
3.3 V
B6
AB15
SAI5_RXFS
SAI
I
3.3 V
C7
6:
Maximum load of 500 mA.
7:
Maximum load of 400 mA.
8:
Requires PU to 1.8 V, max. 3.6 V.