User's Manual l TQMa8MxML UM 0103 l © 2022, TQ-Systems GmbH
Page 46
3.2.9.6
I/O voltages
The TQMa8MxML provides three LGA pads that define the I/O voltages for specific rails of the CPU. They are listed in the
following table and must be set on the carrier board. If not set, the corresponding TQMa8MxML I/O signals are not supplied with
voltage. The TQMa8MxML supply outputs V_1V8 or V_3V3 can be used for this purpose. If 2.5 V is to be used, this voltage must
be provided by the carrier board, since it cannot be provided by the TQMa8MxML.
Table 39:
Configurable voltages
TQMa8MxML
Permitted voltages
Max. load
Remark
V_ECSPI
1.8 / 3.3 V
15 mA at 1.8 V; 27 mA at 3.3 V
–
V_ENET
1.8 / 2.5 / 3.3 V
32 mA at 1.8 V; 58 mA at 3.3 V
RGMII: 1.8 V or 2.5 V
RMII:
1.8 V or 3.3 V
V_UART
1.8 / 3.3 V
15 mA at 1.8 V; 27 mA at 3.3 V
–
3.2.9.7
Power-Up sequence TQMa8MxML / carrier board
Since the TQMa8MxML operates with 5 V and the I/O voltages of the CPU signals are generated on the TQMa8MxML,
there are timing requirements for the carrier board design with respect to the voltages generated on the carrier board:
After power up of the 5V supply for the TQMa8MxML, the PMIC power-up sequence starts. External TQMa8MxML inputs driven
by the carrier board may only be switched on after the power-up of V_3V3. LGA pad P1 (V_3V3) can be used as feedback.
The following figure illustrates the recommended control of the voltage regulators on a carrier board.
Carrier board
DC/DC 3V3
Startup < 4 msec
TQMa8MxML
V_5V_IN
V_3V3
ENABLE
V
IN
V
OUT
V
IN
5 V
3.3 V / 1.8 V / ...
Figure 23: Block diagram power supply carrier board
Attention: Destruction or malfunction, Power-Up sequence
To avoid cross-supply and errors in the power-up sequence, no I/O pins may be driven by external
components until the power-up sequence has been completed.
The end of the power-up sequence is indicated by a high level of signal V_3V3, TQMa8MxML pad P1.
3.2.9.8
Standby and SNVS
In Standby Mode, several voltage controllers on the TQMa8MxML are switched off.
The rails V_1V8_SNVS and V_0V8_SNVS remain active, which ensures the correct function of the RTC.
