User's Manual l TQMa8MxML UM 0103 l © 2022, TQ-Systems GmbH
Page 37
3.2.5.11
ECSPI
The SPI interfaces of the i.MX 8M Mini are full-duplex capable and support both master and slave modes.
As a primary function, the ECSPI1 and ECSPI2 interfaces each have a chip select on TQMa8MxML LGA pads.
ECSPI3 can be multiplexed to UART pads.
The voltage supply must be set to 1.8 V or 3.3 V via LGA pad V_ECSPI.
i.MX 8M Mini / Nano
LGA
ECSPI1_SS0
ECSPI1_MOSI
ECSPI1_SCLK
ECSPI1_MISO
ECSPI1 Interface
ECSPI2_SS0
ECSPI2 Interface
ECSPI2_MOSI
ECSPI2_MISO
ECSPI2_SCLK
Figure 17: Block diagram ECSPI
The following table shows the signals used by the ECSPI interface.
Table 29:
ECSPI signals
Signal
Direction
CPU ball
TQMa8MxML
Power group
ECSPI1_MISO
I
A7
A18
V_ECSPI
ECSPI1_MOSI
O
B7
B18
ECSPI1_SCLK
O
D6
A17
ECSPI1_SS0
O
B6
B16
ECSPI2_MISO
I
A8
C19
ECSPI2_MOSI
O
B8
D19
ECSPI2_SCLK
O
E6
B19
ECSPI2_SS0
O
A6
C17
3.2.5.12
QSPI
(See chapter 3.2.2.3.)
