User's Manual l TQMa8MxML UM 0103 l © 2022, TQ-Systems GmbH
Page 24
3.2.2.3
QSPI NOR Flash
The i.MX 8M Mini has two QSPI interfaces, of which QSPI_A is occupied on the TQMa8MxML when QSPI NOR Flash is populated.
If no QSPI NOR Flash is populated on the TQMa8MxML, the QSPI_A interface signals can be used on the carrier board.
The following block diagram shows how the QSPI NOR Flash is connected to the i.MX 8M Mini.
i.MX 8M Mini / Nano
NAND_DATA0[3:0]
QSPI NOR
DQ[3:0]
LGA
NAND_CE0_B
C
NAND_ALE
S#
QSPIA_SS0#
QSPIA_DATA[3:0]
QSPIA_SCLK
Figure 4:
Block diagram QSPI NOR Flash interface
3.2.2.4
EEPROM 24LC64T
A serial EEPROM, controlled by the I2C1 bus, is assembled. Write-Protection (WP) is not supported by default but available as an
assembly option. The following block diagram shows how the EEPROM is connected to the i.MX 8M Mini.
i.MX 8M Mini / Nano
EEPROM
I2C1_SCL
I2C1_SDA
SCL
SDA
Figure 5:
Block diagram EEPROM interface
A 64 Kbit EEPROM 24LC64T is assembled by default on the TQMa8MxML.
The EEPROM has I
2
C address
3.2.2.5
EEPROM with temperature sensor SE97BTP
A serial EEPROM including temperature sensor type SE97BTP, controlled by the I2C1 bus, is assembled on the TQMa8MxML.
The lower 128 bytes (address 00h to 7Fh) can be set to Permanent Write-Protected Mode (PWP) or to Reversible Write-Protected
Mode (RWP) by software. The upper 128 bytes (address 80h to FFh) cannot be write-protected and are available for general data
storage. The overtemperature output of the SE97BTP is connected as open drain to TQMa8MxML pad E12 (TEMP_EVENT#).
This requires a pull-up to 3.3 V on the carrier board.
The device is assembled on the top side of the TQMa8MxML, see component D12, Figure 28.
The device provides the following I
2
C addresses:
o
EEPROM (Normal Mode):
o
EEPROM (Protection Mode):
o
Temperature sensor:
