User's Manual l MBa6ULxL UM 0101 l © 2018, TQ-Systems GmbH
Page 20
4.2.11
20-pin headers
The MBa6ULxL is equipped with two 20-pin headers with 2.54 mm pitch.
TQMa6ULxL
H
e
a
d
e
r
1
(
X
2
2
)
3.3 V, 5 V, SPI, I2C4, ADC
RS232
Transceiver
RS232
Transceiver
RS 232_1
RS 232_2
UART 1
UART 3
H
e
a
d
e
r
2
(
X
2
3
)
CMOS Sensor Interface (CSI)
3.3 V, 5 V, UART, I2C2, GPIO
Illustration 14:
Block diagram of Starterkit headers – X22, X23
Table 23:
Pinout header 1 – X22
Alternative
Default
Pin
Default
Alternative
5 V
1
2
3.3 V
GND
3
4
GND
UART4_TX
SPI2_SCLK
5
6
I2C4_SCL
–
UART4_RX
SPI2_SS0#
7
8
I2C4_SDA
–
UART5_RX
SPI2_MISO
9
10
TOUCH_INT#
ADC_1
UART5_TX
SPI2_MOSI
11
12
GPIO1_IO02
ADC_2
GND
13
14
GND
–
RS-232_1_TX
15
16
RS-232_2_TX
–
–
RS-232_1_RX
17
18
RS-232_2_RX
–
LCD_DATA17
EXT_WAKEUP
19
20
PWM2
GPIO1_IO09
Table 24:
Pinout header 2 – X23
Alternative
Default
Pin
Default
Alternative
5 V
1
2
3.3 V
GND
3
4
GND
CSI_DATA04
GPIO4_IO25
5
6
GPIO4_IO21
CSI_DATA00
CSI_DATA05
GPIO4_IO26
7
8
GPIO4_IO22
CSI_DATA01
CSI_DATA06
GPIO4_IO27
9
10
GPIO4_IO23
CSI_DATA02
CSI_DATA07
GPIO4_IO28
11
12
GPIO4_IO24
CSI_DATA03
GND
13
14
GND
CSI_MCLK
UART6_TX
15
16
I2C2_SCL
CSI_HSYNC / UART6_CTS
CSI_PIXCLK
UART6_RX
17
18
I2C2_SDA
CSI_VSYNC / UART6_RTS
GND
19
20
GND
