User's Manual l MBa57xx UM 0100 l © 2020, TQ-Systems GmbH
Page 5
3.1.2
Functionality
Core of the system is the TQMa57xx with a TI AM57xx CPU. In addition to the standard communication interfaces like USB,
Ethernet, RS-232, RS-485, etc. all other available signals of the TQMa57xx are routed to 100 mil standard headers.
The MBa57xx provides the following interfaces and functions:
Table 2:
Overview interfaces
Interface
Qty.
Connector
Type
Remark
USB 3.0 Super-Speed Host1&2
2
X31
USB, Type A
Stacked
USB 3.0 Super-Speed Host3
1
X32
USB, Micro B
–
USB 2.0 Hi-Speed Host1
1
X55
DF19, 20-pin
LCD, LVDS
USB 2.0 Hi-Speed Host2
1
X56
100 mil header
LCD, parallel, RGB
USB 2.0 Hi-Speed Host3
1
X26
M.2 Key-B
SATA
USB 2.0 Hi-Speed Host4
1
X29
Mini PCIe
–
USB 2.0 Hi-Speed OTG
1
X9
USB, Micro AB
–
USB Debug
1
X10
USB, Micro AB
–
Ethernet, Gbit
2
X52, X53
RJ45
2 × with integrated magnetics
Ethernet, 10/100 Base-T
2
X21
RJ45
Double, with integrated magnetics
CAN
2
X5, X6
Phoenix, 3-pin
Galvanically separated
RS-485
1
X7
Phoenix, 5-pin
Galvanically separated
RS-232
1
X8
D-Sub9
Debug UART
LVDS
1
X54
DF19, 30-pin
LVDS data
LCD
1
X56
100 mil header
LCD control signals, USB2.0,
resistive touch controller signals
HDMI 1.4
1
X27
HDMI
–
Audio
1
X16
3.5 mm jacks
1 × Line-Out (stereo)
1
X17
1 × Line-In (stereo)
1
X18
1 × Mic (mono)
SD card
1
X14
Push-Pull
–
SATA
1
X26
M.2 Key-B
–
PCIe
1
X41
PCIe
–
1
X29
Mini PCIe
–
1
X25
SIM Card holder
–
Headers
6 ×2
+ 1
X12/X13
X36/X37
X44/X45
X46/X47
X48/X49
X50/X51
X56
100 mil headers
Power-Out (12 V, 5 V, 3.3 V)
LCD interface (parallel)
Resistive Touch Controller
2× 10/100 Mbit Eth MII/MDIO
I2C, SPI, QSPI, GPIO, SDIO, GPMC bus
Power In
1
X23
DC jack (2.5 mm / 5.5 mm)
V
IN
= 24 V DC ±5 %
1
X24
2-pin screw terminal block
Coin cell
1
X20
CR2032 holder
Backup battery for RTC on TQMa57xx
