Preliminary User's Manual l TQMa8Xx UM 0002 l © 2018, TQ-Systems GmbH
Page 7
3.1.2
Connector X1
Table 2:
Pinout connector X1
Ball
I/O
Level
Group
Signal
Pin
Signal
Group
Level
I/O
Ball
–
P
0 V
Ground
GND
1
2
GND
Ground
0 V
P
–
E35
O
1.8 V
ENET
ENET1_REFCLK_OUT
3
4
TEMP_EVENT#
CONFIG
–
O
–
–
P
0 V
Ground
GND
5
6
GND
Ground
0 V
P
–
D32
I
1.8 V
ENET
ENET1_RXC
7
8
ENET1_TXC
ENET
1.8 V
O
F30
–
P
0 V
Ground
GND
9
10
GND
Ground
0 V
P
–
D34
I
1.8 V
ENET
ENET1_RX_CTL
11
12
ENET1_TX_CTL
ENET
1.8 V
O
H28
G31
I
1.8 V
ENET
ENET1_RXD0
13
14
ENET1_TXD0
ENET
1.8 V
O
F32
C33
I
1.8 V
ENET
ENET1_RXD1
15
16
ENET1_TXD1
ENET
1.8 V
O
J29
K28
I
1.8 V
ENET
ENET1_RXD2
17
18
ENET1_TXD2
ENET
1.8 V
O
G29
B34
I
1.8 V
ENET
ENET1_RXD3
19
20
ENET1_TXD3
ENET
1.8 V
O
E31
–
P
0 V
Ground
GND
21
22
GND
Ground
0 V
P
–
P34
I/O
1.8 V
M4 GPIO
M4_GPIO0_IO02
23
24
GPIO0_IO30
GPIO
1.8 V
I/O
L35
R33
I/O
1.8 V
M4 GPIO
M4_GPIO0_IO03
25
26
GPIO0_IO31
GPIO
1.8 V
I/O
N35
R31
I/O
1.8 V
M4 I2C
M4_I2C_SDA
27
28
GPIO1_IO07
GPIO
1.8 V
I/O
R35
P30
I/O
1.8 V
M4 I2C
M4_I2C_SCL
29
30
PMIC_PGOOD
CONFIG
1.8 V
O
–
–
P
0 V
Ground
GND
31
32
GND
Ground
0 V
P
–
H34
O
1.8 V
UART
UART1_TX
33
34
SPI2_SCK
SPI
1.8 V
O
R29
L31
I
1.8 V
UART
UART1_RX
35
36
SPI2_SDO
SPI
1.8 V
O
P32
N29
O
1.8 V
UART
UART1_RTS#
37
38
SPI2_SDI
SPI
1.8 V
I
N31
K32
I
1.8 V
UART
UART1_CTS#
39
40
SPI2_CS0#
SPI
1.8 V
O
P28
–
P
0 V
Ground
GND
41
42
SPI1_CS0#
SPI
1.8 V
O
M34
D30
O
1.8 V
ENET
ENET0_MDC
43
44
SPI1_CS1#
SPI
1.8 V
O
M32
B32
I/O
1.8 V
ENET
ENET0_MDIO
45
46
SPI1_SDO
SPI
1.8 V
O
K34
–
P
0 V
Ground
GND
47
48
SPI1_SDI
SPI
1.8 V
I
J35
F28
O
1.8 V
ENET
ENET0_REFCLK_OUT
49
50
SPI1_SCK
SPI
1.8 V
O
L33
–
P
0 V
Ground
GND
51
52
GND
Ground
0 V
P
–
D28
I
1.8 V
ENET
ENET0_RXC
53
54
ENET0_TXC
ENET
1.8 V
O
H24
–
P
0 V
Ground
GND
55
56
GND
Ground
0 V
P
–
B30
I
1.8 V
ENET
ENET0_RX_CTL
57
58
ENET0_TX_CTL
ENET
1.8 V
O
A29
–
P
0 V
Ground
GND
59
60
GND
Ground
0 V
P
–
A31
I
1.8 V
ENET
ENET0_RXD0
61
62
ENET0_TXD0
ENET
1.8 V
O
G25
C29
I
1.8 V
ENET
ENET0_RXD1
63
64
ENET0_TXD1
ENET
1.8 V
O
B28
G27
I
1.8 V
ENET
ENET0_RXD2
65
66
ENET0_TXD2
ENET
1.8 V
O
E27
H26
I
1.8 V
ENET
ENET0_RXD3
67
68
ENET0_TXD3
ENET
1.8 V
O
F26
–
P
0 V
Ground
GND
69
70
GND
Ground
0 V
P
–
G17
I
3.3 V
USB
USB_OTG1_ID
71
72
USB_OTG2_ID
USB
3.3 V
I
F16
H18
P
5 V
USB
USB_OTG1_VBUS
73
74
USB_OTG2_VBUS
USB
3.3 V
P
H16
F14
O
3.3 V
USB
USB_OTG1_PWR
75
76
USB_OTG2_PWR
USB
3.3 V
O
H14
G15
I
3.3 V
USB
USB_OTG1_OC
77
78
USB_OTG2_OC
USB
3.3 V
I
C15
–
P
0 V
Ground
GND
79
80
GND
Ground
0 V
P
–
E19
I/O
3.3 V
USB
USB_OTG1_DN
81
82
USB_OTG2_DN
USB
3.3 V
I/O
D16
D18
I/O
3.3 V
USB
USB_OTG1_DP
83
84
USB_OTG2_DP
USB
3.3 V
I/O
E17
–
P
0 V
Ground
GND
85
86
GND
Ground
0 V
P
–
C25
I/O
1.8/3.3 V
SD
SD1_CMD
87
88
USB_SS_TX_P
USB
1.0 V
O
B16
–
P
0 V
Ground
GND
89
90
USB_SS_TX_N
USB
1.0 V
O
A35
G23
O
1.8/3.3 V
SD
SD1_CLK
91
92
GND
Ground
0 V
P
–
–
P
0 V
Ground
GND
93
94
USB_SS_RX_P
USB
1.0 V
I
A19
A27
I/O
1.8/3.3 V
SD
SD1_DATA0
95
96
USB_SS_RX_N
USB
1.0 V
I
B18
B26
I/O
1.8/3.3 V
SD
SD1_DATA1
97
98
GND
Ground
0 V
P
–
D26
I/O
1.8/3.3 V
SD
SD1_DATA2
99
100
PCIE_TX_N
PCIe
1.0 V
O
A9
E25
I/O
1.8/3.3 V
SD
SD1_DATA3
101
102
PCIE_TX_P
PCIe
1.0 V
O
B10
–
P
0 V
Ground
GND
103
104
GND
Ground
0 V
P
–
D24
I
1.8 V
SD
SD1_WP
105
106
PCIE_RX_N
PCIe
1.0 V
I
B12
A25
I
1.8 V
SD
SD1_VSELECT
107
108
PCIE_RX_P
PCIe
1.0 V
I
A13
E23
I
1.8 V
SD
SD1_CD#
109
110
GND
Ground
0 V
P
–
B24
O
1.8 V
GPIO
GPIO4_IO19
111
112
PCIE_REFCLK_N
PCIe
1.8 V
O
D12
–
P
0 V
Ground
GND
113
114
PCIE_REFCLK_P
PCIe
1.8 V
O
E11
D10
I
3.3 V
PCIe
PCIE_CLKREQ#
115
116
GND
Ground
0 V
P
–
H10
O
3.3 V
PCIe
PCIE_PERST#
117
118
IMX_ONOFF
CONFIG
1.8 V
I
AH28
A11
I
3.3 V
PCIe
PCIE_WAKE#
119
120
GND
Ground
0 V
P
–
