background image

 

-8- 

 

PN

2 Expansion connector 

 

#  Signal 

Function 

 

#  Signal 

Function 

 

A1 GND 

Signal 

GND

 

 

B1 GND Signal 

GND

 

 

A2 GND 

Signal 

GND

 

 

B2 GND Signal 

GND

 

 

A3 VCC_5 

VCC5V 

  B3 VCC_5 VCC5V

 

 

A4 VCC_5 

VCC5V 

  B4 VCC_5 VCC5V

 

 

A5 VCC_3.3 

VCC3.3V 

  B5 CADD0 Address 

bus

 

O

 

A6 VCC_3.3 

VCC3.3V

 

 

B6 CADD1 Address 

bus

 

O

 

A7 VCC_3.3 

VCC3.3V

 

 

B7 GND Signal 

GND

 

 

A8 VCC_3.3 

VCC3.3V

 

 

B8 CADD2 Address 

bus

 

O

 

A9 CADD16 

Address 

bus 

O

B9 CADD3 Address 

bus

 

O

 

A10 CADD17 

Address bus

 

O

B10 CADD4 Address 

bus

 

O

 

A11 CADD18 

Address bus

 

O

B11 CADD5 Address 

bus

 

O

 

A12 CADD19 

Address bus

 

O

B12 CADD6 Address 

bus

 

O

 

A13 CADD20 

Address bus

 

O

B13 CADD7 Address 

bus

 

O

 

A14 CADD21 

Address bus

 

O

B14 CADD8 Address 

bus

 

O

 

A15 CADD22 

Address bus

 

O

B15 CADD9 Address 

bus

 

O

 

A16 CADD23 

Address bus

 

O

B16 CADD10 Address 

bus

 

O

 

A17 CADD24 

Address bus

 

O

B17 CADD11 Address 

bus

 

O

 

A18 CADD25 

Address bus

 

O

B18 CADD12 Address 

bus

 

O

 

A19  WR0 

Write signal 0 

O

B19 CADD13 Address 

bus

 

O

 

A20  WR1 

Write signal 1 

O

B20 CADD14 Address 

bus

 

O

 

A21  WR2 

Write signal 2 

O

B21 CADD15 Address 

bus

 

O

 

A22  WR3 

Write signal 3 

O

B22 MAINCLK2 Clock 

O

 

A23 RD 

Read signal 

O

B23 WR 

Write signal 0 

O

 

A24 BS 

 

O

B24 NC  

 

A25 GND 

Signal 

GND

 

 

B25 GND Signal 

GND

 

 

A26 CDA8 

Data bus 

I/O B26 CDAT0 Data 

bus

 

I/O

A27 CDA9 

Data bus 

I/O B27 CDAT1 Data 

bus

 

I/O

A28 CDA10 

Data bus

 

I/O B28 CDAT2 Data 

bus

 

I/O

A29 CDA11 

Data bus

 

I/O B29 CDAT3 Data 

bus

 

I/O

A30 CDA12 

Data bus

 

I/O B30 CDAT4 Data 

bus

 

I/O

A31 CDA13 

Data bus

 

I/O B31 CDAT5 Data 

bus

 

I/O

A32 CDA14 

Data bus

 

I/O B32 CDAT6 Data 

bus

 

I/O

A33 CDA15 

Data bus

 

I/O B33 CDAT7 Data 

bus

 

I/O

A34 IRQSUB0 

IRQ0

 

I

B34 CS0 Reserved 

Summary of Contents for TMM1000

Page 1: ...TMM1000 HARDWARE MANUAL 2003 07 04...

Page 2: ...Introduction 1 1 1 Outline 1 1 2 Features 1 1 3 Specifications 2 1 4 Composition 3 2 I O 4 2 1 Memory I O map 4 2 2 Detailed I O area 5 2 3 IRQ 5 2 4 I O built in CPU 6 3 I O terminals 7 4 LAN LED dis...

Page 3: ...NUX etc 1 2 Features a As HITACHI SH microcomputer is adopted low power consumption and no fan can be realized b As compact flash interface is included as standard equipment no drive member exists suc...

Page 4: ...C111 SMSC I O Compact flash X 1 Serial 0 3 3V IF built in SCI Serial 1 D SUB 9 pin built in SCIF Serial 2 Built in SCI Touch panel scan IF USB SL811HST Others Sound Monaural 8 bit DA Output 300mW Debu...

Page 5: ...806 S RAM 512Kbyte SDRAM 32Mbyte F EP ROM 4Mbyte USB PN10 PN16 CONTROL PN5 PN4 PN15 PN12 PN9 SW LCD Other Ext Power PN14 PN7 Touch Panel Speaker PN17 PN13 PN11 PN18 PN19 COM1 COM2 COM0 Expansion termi...

Page 6: ...al mapping on area Area Address Bus width Area 0 H 00000000 to H 03FFFFFF 16 F EPROM 4M Byte to H 003FFFFF Area 1 H 04000000 to H 07FFFFFF I O built in CPU Area 2 H 0 000000 to H 0BFFFFFF 32 S DRAM sp...

Page 7: ...t In case of accessing to a register access to even numbered addresses Although inside information on multipurpose I O is not published control necessary to use this board is supplied in the library O...

Page 8: ...PU are connected with the following terminals Function terminal Connecter s COM RXD0 TXD0 PN11 COM RXD2 TXD2 CTS2 RTS2 PN17 PN18 COM RXD1 TXD1 PN13 PN19 Speaker DA0 PN7 HUDI TCK TRST TD0 ASEBREAK TMS...

Page 9: ...IORD I O read signal 10 A9 Address bus O 35 IOWR I O write signal 11 A8 Address bus O 36 WR Memory write 12 A7 Address bus O 37 RDY WAIT indication I 13 VCC VCC 3 3V 38 VCC VCC 3 3V 14 A6 Address bus...

Page 10: ...ADD9 Address bus O A16 CADD23 Address bus O B16 CADD10 Address bus O A17 CADD24 Address bus O B17 CADD11 Address bus O A18 CADD25 Address bus O B18 CADD12 Address bus O A19 WR0 Write signal 0 O B19 CA...

Page 11: ...B46 INI_G Reserved I A47 RESET Reset input I B47 INI_CE Reserved I A48 WAIT Wait B48 INI_WR Reserved I A49 GND Signal B49 GND Signal A50 GND Signal B50 GND Signal PN3 Terminals used by manufacturer D...

Page 12: ...put O 2 GND Signal PN9 for debugging Signal Function Signal Function 1 TCK Clock I 2 GND Signal 3 TRST reset I 4 GND Signal 5 TDO Data output O 6 GND Signal 7 ASEBRKAK Emulator terminal O 8 NC Not con...

Page 13: ...e O 11 Signal line O 12 GND Signal O 13 Signal line O 14 12 Signal line O 15 Signal line O 16 5 Signal line O 17 Signal line O 18 3 Signal line O 19 GND Signal O 20 16 Signal line O 21 Signal line O 2...

Page 14: ...unction 1 VCC 5 2 DATA Signal line I O 3 DATA Signal line I O 4 GND Signal 13 customer display connector dev ttySC2 Signal Function 1 VCC_5 VCC5V 2 TxD Transmit data O 3 GND Signal 14 Touch panel Sign...

Page 15: ...O 19 A9 Address bus O 20 IOWR IO write signal O 21 A8 Address bus O 22 WR Memory write O 23 A7 Address bus O 24 RDY indication I 25 VCC 26 VCC VCC3 3V 27 A6 Address bus O 28 CSEL Selection signal O 2...

Page 16: ...xD Receive data I 7 RTS Request to send O 3 TxD Transmit data O 8 CTS Clear to send I 4 DTR Data terminal ready O 9 RI Ring indicator Not used I 5 GND Signal PN18 Serial connector dev ttySC1 Mutually...

Page 17: ...Sign al Function 1 DCD Data terminal ready Not used I 6 DSR Data set ready Not used I 2 RxD Receive data I 7 RTS Request to send O 3 TxD Transmit data O 8 CTS Clear to send I 4 DTR Data terminal read...

Page 18: ...Display of LED is programmed as follows LAN LED Color Function Upper Green Power supply indication Lighting when 5V power is supplied Middle Red LAN Built up the link at 100MBps or 10MBps Lower Red L...

Page 19: ...marketing Dept Persons in charge Masuda and Sasaoka TEL 81 3 3816 7864 E mail info towa meccs co jp We renew detailed information in our home page from time to time SH Board TMM1000 http www towanet c...

Reviews: