TXZ Family
Serial Peripheral Interface
2019-02-28
47 / 67
Rev. 3.0
3.3.10. DMA request
The DMA request has the transmit and receive request. These request have the single and burst request.
Supported DMA requests depend on the product. Please refer to reference manual of “Product Information” for
details.
3.3.10.1. Transmit DMA request
The single DMA request of transmission and a burst DMA request of transmission will be enabled when
[TSPIxCR2]
<DMATE> is set to "1".
When FIFO has one or more stages, a single request occurs.
A burst transmit DMA request occurs when a value of
[TSPIxSR]
<TLVL[3:0]> indicating current value of fill
level is equal or less than transmit interrupt generation condition (fill level) specified in
[TSPIxCR2]
<TIL[3:0]>.
If
[TSPIxSR]
<TLVL[3:0]> is still equal or less than the fill level after completion of DMA transfer, a burst
transmit DMA request occurs again.
3.3.10.2. Receive DMA request
The single DMA request of receive and a burst DMA request of receive will be enabled when
[TSPIxCR2]
<DMARE> is set to "1".
When FIFO has one or more data, a single request occurs.
A burst receive DMA request occurs when a value of
[TSPIxSR]
<RLVL[3:0]> indicating current value of fill
level is equal or greater than receive interrupt generation condition (fill level) specified in
[TSPIxCR2]
<RIL[3:0]>.
If
[TSPIxSR]
<RLVL[3:0]> is still equal or greater than
[TSPIxCR2]
<RIL[3:0]> after completion of DMA
transfer, a burst receive DMA request occurs again.
3.3.11. Coordinated movements by the completion of communication
It can cooperate with other functions, such as starting of a timer counter, with the signal of the completion of the
completion of transmitting/ reception. Please refer to the reference manual "Product Information" for details.
3.3.12. Software reset
TSPI can be initialized, being able to apply reset by software. Please refer to “4.2.1
[TSPIxCR0]
(TSPI control
register 0)” for details.