IK-TF9P
1-17
34
8.
INPUT OUTPUT SIGNAL SPECIFICA
T
OINS
5H 21H
(P
ositiv
e polar
ity mode)
(Negativ
e polar
ity mode)
More than 2
N
s
More than 2
N
s
2.0
N
s 5.0
N
s
( 4 )
External HD/VD Input Phase Specifications
200
200
Exter
nal HD
rising edge
Center
Unit :
Cloc
k
1 clk=12.36nsec
Exter
nal HD
The phase relationship of the e
xter
nal HD and
VD should correspond to the center phase (i.e
., the e
xter
nal HD f
alling
edge) as illustr
ated in the abo
v
e
diag
ram.
External
VD falling edge:
Please input within about 200 cloc
k cycles of the standard center phase
.
Note that
V sync of the video is output with a dela
y of about 2H from the e
xter
nal
VD at the time of reset-restar
t and
the e
xter
nal tr
igger mode
.
In the normal mode:
Continuously with the HD per
iod of 62.8 μs and
VD per
iod of 50.0 ms (par
tial scanning 25fps:
39.87 ms
, 30fps:
33.29
ms
, 35fps:
28.58 ms
, 40fps:
24.31 ms
, 45fps:
22.17 ms
, 50fps:
19.98 ms).
Phase timing is as illustr
ated in the abo
v
e
diag
ram (with only the f
alling edge applicab
le).
In the reset-restar
t/e
xternal trig
g
er mode:
Contin
uously with the HD per
iod of 62.8 μs
. VD (reset) is at an arbitr
ar
y timing with the phase of HD being within the
standard of the abo
v
e
diag
ram.
( 1 )
HD Input Specifications
( 2 )
VD Input Specifications
( 3 )
T
rigg
er Pulse Specifications
35
9.
CCD OUTPUT
W
A
VEFORM
TIMING CHAR
T
( 1 )
Horizontal Output
W
a
vef
orm
Timing Char
t
2048
2048
1
CLK=12.36nsec
(80.8736MHz)
LVAL、
DVAL
RGB data
Pix
el
Cloc
k
Hor
iz
ontal b
lanking inter
val 492 clk
(6.08
N
s)
Output video inter
v
al 2048 clk
(25.3
N
s)
One hor
iz
ontal scan inter
v
al 2540 clk
(31.4
N
s)
LVAL、
DVAL
FV
AL
RGB data
(CCD READOUT)
Video output
Vertical blanking
interval 56H
Vertical blanking
interval 56H
57
1591
1592
1590
1589
1588
1587
1586
1585
1584
1583
1582
57
1592
1
2
3
4
5
6
7
8
46
1
2
3
4
5
6
7
8
9
47
48
49
50
51
52
53
54
55
56
47
48
49
50
51
52
53
54
55
56
1592H
(
1759
μ
s
)
(
1759
μ
s
)
(
1759
μ
s
)
56H
1536H
( 2 )
V
er
tical Output
W
a
vef
orm
Timing Char
t
Summary of Contents for IK-TF9P
Page 38: ...IK TF9P 4 2 Process PC Board 1 2 Top Side Bottom Side ...
Page 39: ...IK TF9P 4 3 TG PC Board 1 3 Top Side Bottom Side ...
Page 40: ...IK TF9P 4 4 Mother PC Board 1 4 Top Side ...
Page 41: ...IK TF9P 4 5 Bottom Side ...
Page 42: ...IK TF9P 4 6 Rear PC Board 1 5 Top Side Bottom Side ...
Page 47: ...3 CIRCUIT DIAGRAMS 3 1 Overall Wiring Diagram 4 15 IK TF9P 4 16 ...
Page 48: ...3 2 Sub Circuit Diagram 4 17 IK TF9P 4 18 ...
Page 49: ...3 3 Process Circuit Diagram 3 3 1 Process Circuit Diagram 1 4 19 IK TF9P 4 20 ...
Page 50: ...4 21 IK TF9P 4 22 3 3 Process Circuit Diagram 3 3 2 Process Circuit Diagram 2 ...
Page 51: ...3 4 TG Circuit Diagram 4 23 IK TF9P 4 24 ...
Page 52: ...3 5 Mother Circuit Diagram 3 5 1 Mother Circuit Diagram 1 4 25 IK TF9P 4 26 ...
Page 53: ...3 5 Mother Circuit Diagram 3 5 2 Mother Circuit Diagram 2 4 27 IK TF9P 4 28 ...
Page 54: ...3 6 Head Circuit Diagram 4 29 IK TF9P 4 30 ...
Page 56: ......