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LCD Module User Manual
LMT056DIDFWD-ABN
Document Name: LMT056DIDFWD-ABN-Manual-Rev0.2
Page: 12 of 14
8.1.6
Hardware Related Parameter
Booster and Power circuit
Internal DC-DC booster and Backlight driver are controlled by SSD1963 GPIO0 and GPIO1
respectively. It is necessary to enable them for normal operation via command
Backlight Brightness PWM control
It is suggested to config the backlight brightness control signal as 3kHz PWM signal for best
performance.
8.1.7
Startup Program (Example)
_RST=1; delayms(10);
// wait for all power stable
_RST=0; delayms(1);
// reset pulse
_RST=1; delayms(10);
// wait till internal reset routine finish
SdCmd(0xe2); SdData(0x3B); SdData(0x02); SdData(0x04); delayms(10); // config PLL to 200MHz
SdCmd(0xe0); SdData(0x01); delayms(10);
// enable PLL
SdCmd(0xe0); SdData(0x03); delayms(10);
// switch to use PLL clock
SdCmd(0x11);
// exit_sleep_mode
SdCmd(0x13);
// enter_normal_mode (exit_partial_mode)
SdCmd(0x20);
// exit_invert_mode
SdCmd(0x38);
// exit_idle_mode (using full color)
SdCmd(0xB8);
// set_gpio_conf
SdData(0x0f);
// GPIO[0~3] controlled by host
SdData(0x01);
// GPIO0 as normal GPIO
SdCmd(0xba); SdData(0x01); delayms(10);
// GPIO[0~3]=0001, enable DC-CD booster
SdCmd(0xba); SdData(0x03); delayms(10);
// GPIO[0~3]=0011, enable backlight booster
SdCmd(0xf0); SdData(0x00);
// set_pixel_data_interface (MCU) 8bit
SdCmd(0xb0);
// set_lcd_mode
SdData(0x24);
// 24bit, disable FRC or dithering, DCLK=rising edge
SdData(0x20);
// HSYNC=active lo, VSYNC=active low, default TFT m
SdData(0x02); SdData(0x7f);
// panel size 640-1
SdData(0x01); SdData(0xdf);
// panel size 480-1
SdCmd(0xb4);
// set_hori_period
SdData(0x03); SdData(0x1f);
// total pluse per line, HT=800-1
SdData(0x00); SdData(0x9f);
// horizontal front porch, HPS=160-1
SdData(0x07);
// HPW=0x07(default), not use
SdData(0x00); SdData(0x00);
// LPS=0x0000(default), not use
SdData(0x00);
// LPSPP=0x00(default), not use
SdCmd(0xb6);
// set_vert_period
SdData(0x02); SdData(0x0c);
// total line per frame, VT=525-1
SdData(0x00); SdData(0x2c);
// vertical front porch, VPS=45-1
SdData(0x01);
// VPW=0x01(default), not use
SdData(0x00); SdData(0x00);
// FPS=0x0000(default), not use
SdCmd(0xe6); SdData(0x01); SdData(0xe0); SdData(0x00);// config PCLK=40ns(PLL@200MHz)
SdCmd(0x36);
// set_address_mode
SdData(0x00);
// top to bottom, left to right, RGB, normal
SdCmd(0xbe);
// set_pwm_conf
SdData(0x00);
// PWM clock set to 3kHz (PLL@200MHz)
SdData(150);
// PWM width at about 60% (150/255)
SdData(0x01);
// C[3]=0, non_DBC control; C[0]=1, enable PWM
SdData(0xf0);
// DBC manual level at middle
SdData(0x00);
// DBC minimum lever at middle
SdData(0x00);
// disable the DBC response delay setting
SdCmd(0x29);
// display on
SdCmd(0x2c);
// write_memory_start
SdData(0xff); SdData(0xff); SdData(0xff);
// write a white pixel
SdData(0xff); SdData(0x00); SdData(0x00);
// write a red pixel
..........
// continue wirit display data
Note. Above example program may need modification to fit correspondent application.
ZZZWRSZD\GLVSOD\VHX
LQIR#WRSZD\GLVSOD\VHX
