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TIDE and Tibbo BASIC User Manual
©2000-2008 Tibbo Technology Inc.
platform supports this property, then 0.5 second is the default period and the
property allows your program to adjust it.
If your software has some periodic tasks you can put the code into the
on_sys_timer event handler. Notice that when generated, this event goes into the
queue and waits in line to be processed, just like all other events. Therefore, you
cannot expect great accuracy in the period at which the on_sys_timer event
handler is entered. You can just expect that on average you will be getting this
event every 0.5 seconds.
There is also a
read-only property. Timer counter is a free-
running counter that is initialized to 0 when your device is powered up and
increments every 0.5 seconds. The sys.timercount is useful in determining elapsed
time, for instance, when you are waiting for something.
Here is an example. Supposing, you are supposed to wait for the serial data to
arrive, but you are not willing to wait more than 10 seconds:
dim
w
as
word
...
...
w=sys.timecount
'memorize time count at the beginning of waiting for
serial data
while
ser.rxlen=
0
'nope, no data yet, do we still have time?
if
sys.timecount-w>
20
then
goto
enough_waiting
'we quit after 10
seconds
doevents
'polite waiting includes this
wend
...
...
The above example does not represent best coding style. Generally
speaking, this is not a great programming but sometimes you just
have to wait in a cycle.
PLL Management
PLL is a module of the device that transforms the clock generated by onboard
crystal into higher frequency (x8 of the base for Tibbo devices). When the PLL is
on, the device runs at 8 times the base frequency, when the PLL is off, the device
runs at a "native" frequency of the crystal. Naturally, the device is 8 times faster
(and consumes almost as much more power) when the PLL is on.
Not all Tibbo devices have PLLs- check "Platform-dependent Programming
Information" topic inside your platform specifications section to find out if there is
a PLL on your platform.
When a certain platform supports PLL, it will have a
read-only
property and
method to control the PLL. Due to the nature of PLL
operation it is impossible to switch it on and off while the CPU is executing the
firmware. The PLL needs time to "stabilize" its output frequency and it is not safe
to let this happen when the CPU is running. Instead, the PLL is toggled when the
CPU is in the reset state.
To change PLL mode, request new state through the sys.newpll method, then self-
reset the device through the
method. After the reboot the device
emerges from reset with new PLL state (and PLL frequency already stabilized).
Here is a code example that makes sure that your device is running with PLL off:
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