Themis RES-32DCX, Installation Manual

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Themis Computer
Overview and Specifications
Chipset Overview
1.2 Chipset Overview
Built upon the functionality and the capability of the Intel 5000X chipset, the
RES-32DCX provides the performance and feature set required for dual processor-
based servers, including optimal configuration options for communications, presen-
tation, storage, computation or database applications. The 5000X chipset supports
single or dual Xeon 64-bit dual-core processors with front-side bus speeds of up to
1.333 GHz. The Intel chipset consists of:
• the 5000X Memory Controller Hub (MCH),
• the Intel 6321 Enterprise South Bridge (ESB) I/O Controller Hub (ICH), and
• the 6700 PCI-X 64-bit hub (PXH-V).
In addition, a Super I/O Controller chip offers a range of functions to increase the
I/O cabability of the system.
1.2.1 The Intel 5000X Memory Controller Hub (MCH)
The 5000X Memory Controller Hub (MCH) chipset is designed for symmetric mul-
tiprocessing across two independent front-side bus interfaces. Each front-side bus
uses a 64-bit wide, 1.333 GHz data bus that transfers data at 10.7 GB/sec (for a total
bandwidth of 21.3 GB/sec.)
The MCH provides four channels of Fully-Buffered DIMM (FB-DIMM) memory.
Each of these channels can support up to four Dual Ranked FB-DIMM DDR2
DIMMs. FB-DIMM memory channels are organized in to two branches for support
of RAID 1 (mirroring). The RES-32DCX MCH chipset connects up to 8 fully-buff-
ered DIMM modules, providing a total of 32.0 GB/s for DDR2 667/533 memory.
The MCH chipset also provides three x8 PCI-
Express and one x4 ESI interface to the
ESB2. In addition, the 5000X chipset offers a wide range of RAS features, including
memory interface ECC, x4/x8 Single Device Data Correction, CRC, parity protec-
tion, memory mirroring and memory sparing.
The Xeon dual-core processor is designed to be used in conjunction with the 5000X
chipset, and provides the following features:
• L1 Cache Size: Instruction Cache (32KB/16KB), Data Cache (32KB/24KB)
• L2 Cache Size: 4MB/2MB (per core)
• Data Bus Transfer Rate: 8.5 GB/s
• Package: FC-LGA6/FC-LGA4, 771 Lands