Themis RES-22XR3, Installation Manual

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RES-22XR3 Installation Manual - Configuration 1 Version 1.3
1-10
Themis Computer
1.3 Chipset Overview
Built upon the functionality and capability of the Intel 5520 platform, RES-22XR3
motherboards provide the performance and features required for dual processor-
based high-end systems, including optimal configuration options for communica-
tions, high-end CAD systems, presentation, computation or database applications.
Two Intel 5500/5600 Series (LGA 1366) processors, each processor supporting two
full-width Intel QuickPath Interconnect (QPI) @6.4 GT/s with a total of up to 51.2
GB/s Data Transfer Rate (6.4 GT/s per direction). The Intel chipset consists of:
• Dual Intel 5520 (Tylersburg) chipset, and
• the 2x IOH-36D
With the QPI controller built in the processor, the 5500/5600 Series Processor plat-
form offers the next generation point-to-point system interconnect interface, replac-
ing the current Front Side Bus Technology, providing substantial system
performance enhancement by utilizing serial link interconnections, allowing
increased bandwidth and scalability. The IOH connects to each processor through an
independent QuickPath Interconnect link. Each link consists of 20 pairs of unidirec-
tional differential lanes for transmission and receiving in addition to a differential
forwarded clock. A full-width QuickPath interconnect link pair provides 84 signals.
Each processor supports two QuickPath links, one going to the other processor and
the other to the 5520 chip.
The Intel 5520 platform supports up to 36 PCI Express Gen2 lanes, and the 5520
Northbridge supports peer-to-peer read and write transactions. The ICH10R pro-
vides up to 7 PCI-Express ports, six SATA ports and 10 USB connections. In addi-
tion, the Intel 5520 platform also offers a wide range of RAS (Reliability,
Availability and Serviceability) features. These features include memory interface
ECC, x4,/x8 Single Device Data Correction (SDDC), Cyclic Redundancy Check
(CRC), parity protection, out-of-band register access via SMBus, memory mirroring,
memory sparing, and Hot-plug support on the PCI-Express Interface.
1.3.1 The 5500/5600 Series Processor and 5520 Chipset
• Four/six processor cores in each processor with 8MB shared cache among cores
• Two full-width Intel QuickPath interconnect links, up to 6.4 GT/s of data transfer
rate in each direction
• Virtualization Technology, Integrated Management Engine supported
• Point-to-point each coherent interconnect, Fast/narrow unidirectional links, and
Concurrent bi-directional traffic
• Error detection via CRC and Error correction via Link level retry