manualshive.com logo in svg

Thales Cinterion LGA DevKit L, User Manual, Page: 21 / 36

Share
Download
Thales Cinterion LGA DevKit L User Manual Download Page 21

Cinterion

® 

LGA DevKit User Guide

6.2 LGA DevKit on DSB75

35

t

lga_devkit_ug_v03

2020-05-29

Public / Released

Page 21 of 36

6.2

LGA DevKit on DSB75

To operate the LGA DevKit with the DSB75 please complete the following steps:

•

Mount the LGA DevKit onto the DSB75.

•

Insert the module.

•

Set "PWR" and "ASC0".

•

Check if all jumpers are placed at the pin header: CONTROL, ASC0_A and PWR

•

Connect the host PC to DSB75 via Sub-D.

•

Connect power to DSB75 and if needed to the LGA DevKit.

•

Press the ON button (or the DSB75 IGT button).

Figure 17:  

LGA DevKit on DSB75

Summary of Contents for Cinterion LGA DevKit L

Page 1: ...Cinterion LGA DevKit User Guide Version 03 DocId lga_devkit_ug_v03 ...

Page 2: ...HT TO USE THE DOCUMENT THE RECIPIENT SHALL NOT COPY MODIFY DISCLOSE OR REPRODUCE THE DOCUMENT EXCEPT AS SPECIFICALLY AUTHORIZED BY THALES Copyright 2020 THALES DIS AIS Deutschland GmbH Trademark Notice Thales the Thales logo are trademarks and service marks of Thales and are registered in certain coun tries Microsoft and Windows are either registered trademarks or trademarks of Microsoft Corporati...

Page 3: ...uration 13 4 4 ON Button Module Start and Power Down 14 4 5 RST Button Module Reset 14 4 6 ASC0 Switch Module UART Interface Selection 14 4 7 PWR Switch Power Source Selection 14 4 8 Free Level Shifters 15 4 9 LEDs 15 4 10 Patch Field 15 4 11 RF Antenna 16 4 12 Power Supply 17 4 12 1 Supply Current Measurement 17 4 12 2 External Reference Supply 18 5 General Characteristics 19 6 Operating the LGA ...

Page 4: ...Document Information 24 8 1 Revision History 24 8 2 Related Documents 24 8 3 Safety Precaution Notes 25 8 4 Regulatory Compliance Information 25 9 Appendix 26 9 1 LGA DevKit SM 26 9 1 1 Placement 26 9 1 2 Schematics 27 9 2 LGA DevKit L 30 9 2 1 Placement 30 9 2 2 Schematics 31 9 3 Errata Troubleshooting 34 ...

Page 5: ...Kit variant 1 1 Feature and Benefits LGA DevKit socket supports four different module footprints with different LGA pad counts for industrial industrial plus platform modules With LGA DevKit SM LGA106 LGA114 and LGA120 With LGA DevKit L LGA156 Future proof ready for new upcoming modules Stand alone Get the LGA module up and running without additional tooling Supports DSB75 DSB Mini as port extende...

Page 6: ...following table lists modules that are supported by the LGA DevKit variants SM and L de pending on the module s pad count i e module s footprint Table 1 Supported products LGA DevKit SM LGA DevKit L S LGA 106 LGA 114 M LGA 120 L LGA 156 BGS12 BGS8 PDS5 BGS2 EHS6 PDS6 BGS5 EHS8 PLS62 W EHS5 ELS61 PLS8 ELS31 ELS81 EMS31 Cinterion ENS22 EXS62 EXS82 ...

Page 7: ...pcs A quick start guide Cinterion LGA DevKit L Ordering number L30960 N0112 A100 Base PCB for the industrial plus platform modules USB and SMA cable An ultra wideband high efficiency antenna A bag of jumpers 25pcs A quick start guide Cinterion LGA DevKit socket SML Ordering number L30960 N0110 A100 The needle socket fitting on both PCB versions SM and L Screws fixing frames retention lid Figure 1 ...

Page 8: ...03 2020 05 29 Public Released Page 8 of 36 Figure 2 LGA DevKit socket SML with LGA DevKit variants SM and L Cinterion LGA DevKit socket SML L30960 N0110 A100 Cinterion LGA DevKit L L30960 N0112 A100 Cinterion LGA DevKit SM L30960 N0111 A100 LGA106 LGA114 LGA120 LGA156 SM L ...

Page 9: ... ON LED lights up The red ERROR LED may indicate issues that should be corrected For de tails see Section 4 9 Note By scanning the QR code at the underside of the LGA DevKit you will also find further information videos and available drivers 2 1 Mounting the LGA DevKit Socket Before operating the socket has to be mounted onto the LGA DevKit with 4 screws Scanning the QR code on the DevKit s unders...

Page 10: ...erchanged and the footprint indicators showing the dif ferent LGA module footprints Figure 3 LGA DevKit SM top view Figure 4 LGA DevKit SM underside view Error LED Configurable interruptible signals Adjustable supply Footprint indicator GPS Activity LEDs Channel select Activity LED USB VCP PWR Current test USB PWR Supply mode MAIN DIV MAIN and DIV antenna connectors are interchanged with the LGA D...

Page 11: ...on Industrial Multifootprint Power 80Pin DSB75 DSB Mini Connector ASC0 Micro USB NativeMicro USB RF Main DRX Antenna Connector On board Sim Connector Combinded Powering MCU control unit Error detection LED Footprint detection Button ON BTN Button RST BTN USB Data Module Signals Power SIM Antenna ASC0 Signal Module Signals StatusLEDS Power User Interface Connectors Power Block Logical Block Control...

Page 12: ...ower supply both USB ports should be used to improve power capabilities Note The modem s USB driver can be downloaded from the LGA DevKit s web page that can be reached by scanning the QR code 4 2 SIM On the LGA DevKit s underside you find a SIM card holder that is con nected to the module s regular SIM interface lines except for the CCIN line where the default jumper needs to be set for CCIN at t...

Page 13: ... the DSB connector marked green in Figure 7 Placing a jumper connects a line through a level shifter to the associated pin at the 2x40 pin connector at the underside of the LGA DevKit and thus to a connected DSB75 DSB Mini See also Figure 5 Not placing a jumper leaves a module signal open External periphery can also be connected to all accessible module signals directly When con necting other exte...

Page 14: ...e that this functionality is only available if the default jumper is set for EMERG_RST at the CONTROL pin block see Section 4 3 4 6 ASC0 Switch Module UART Interface Selection The ASC0 switch selects the module s UART communication interface either via USB VCP FTDI232R or via RS232 D Sub interface on the DSB75 DSB Mini Changing this from USB to RS232 during operation resets the FTDI VCP bridge in ...

Page 15: ...4 level shifters are accessible close to the patch field as well with the reference Vext and Vref The Vref related lev el shifter connections can also be accessed via four addi tional pads at the left underside of the LGA DevKit where additional pins may be soldered Attention The warranty may be lost if the patch field is sol dered Figure 9 Patch field LED Meaning RED Blinking continuously Module ...

Page 16: ... by an U FL connector named GPS All antenna interfaces have additional ESD protection implemented The LGA DevKit package includes a broad band high efficiency PCB antenna that can be used with the DevKit for all radio band combinations Figure 10 S11 MAIN antenna input return loss transmit direction with socket Figure 11 S21 MAIN antenna insertion loss transmit direction with socket Figure 12 S12 M...

Page 17: ...nough energy to support short 2G peak currents up to 2 5A 4 12 1 Supply Current Measurement The LGA DevKit supports three methods to measure the current consumption of the inserted module Measure the voltage across the on board 100 mOhm shunt resistor Measure the current by a current meter Power the module by an external power supply e g power analyzer All options require a jumper placed on the 4t...

Page 18: ... By default i e without an external reference voltage connected the interface operates at 3V to meet the DSB75 DSB Mini requirements But if it is required to operate the interface at another voltage an external source in the range between 1 2V 5V can be connected to REF IN and GND as shown in Figure 15 Figure 15 External reference supply and pin header for free level shifter Please note that this ...

Page 19: ...arameter Min Max Unit Voltage on USB ports 0 3 5 5 V Voltage on DSB port 0 3 5 5 V Voltage on signal pin header depending on used module 0 3 2 1 V Current signal pin header depending on used module 10 10 mA Voltage on external reference 0 3 6 V Socket single contact continues current 2 A Table 3 Operating and environmental conditions Parameter Min Max Unit Recommended operating condition 0 45 C St...

Page 20: ... EXT the DevKit expects the power on the DSB connector If you select USB the DevKit is powered by its USB ports and the DSB expects a separated power source Use the ASC0 switch to select the first UART If you select RS232 the modules ASC0 is conducted to the DSB and can be accessed on the D SUB connector If you select USB the UART can be accessed via USB VCP port Note that the USB VCP bridge will ...

Page 21: ...vKit with the DSB75 please complete the following steps Mount the LGA DevKit onto the DSB75 Insert the module Set PWR and ASC0 Check if all jumpers are placed at the pin header CONTROL ASC0_A and PWR Connect the host PC to DSB75 via Sub D Connect power to DSB75 and if needed to the LGA DevKit Press the ON button or the DSB75 IGT button Figure 17 LGA DevKit on DSB75 ...

Page 22: ...voltage for the I O domain at VDIG pad 10 of the LGA106 foot print Therefore please connect IO25 and VEXT via a jumper 7 2 BGS12 Operation For a proper start of BGS12 a connection between the module s ON signal in Control block and VREF in level shifter block is required 7 3 EMS31 Operation EMS31 V requires a pull up resistor for the SIM interface that is not automatically detected as with other m...

Page 23: ... sure that firmware updates are performed without interruption the default jumper at VEXT at the CONTROL pin header must be removed Instead this jumper needs to be placed at the LEVELSHIFTER pin header to connect VEXT_B and VREF Also with ENS22 the white ON LED blinks only very shortly and about 3 5 seconds before the module actually starts up ...

Page 24: ...ocument Cinterion LGA DevKit User Guide v02 New document Cinterion LGA DevKit User Guide v01 8 2 Related Documents 1 Hardware Interface Description for your Thales module 2 AT Command Set for your Thales module Chapter What is new 6 1 Added note regarding additional pull up resistor on DSB Mini 7 4 Added remark on ENS22 jumper settings required for firmware updates 9 Added placement and schematics...

Page 25: ...LGA DevKit is intended for evaluation and development purposes only and should therefore only be used in a laboratory test environment The device is not CE ap proved and has not been authorized as required by the rules of the FCC All persons handling the Cinterion LGA DevKit must be properly trained in electronics and observe good engineer ing practice standards Pacemaker patients are advised to k...

Page 26: ... C47 C48 C50 C51 C52 C53 C57 C58 C59 C60 C61 C62 C63 C64 C65 C66 C67 C68 C69 C70 C71 C72 C73 C74 C75 C76 C77 C78 CON8 D1 D2 D3 D5 IC1 IC2 IC3 IC4 IC5 IC6 IC 7 IC8 IC9 IC10 IC11 IC14 IC15 IC16 IC17 IC18 IC19 IC20 IC21 IC22 IC99 JP1 JP7 L28 L29 L30 L31 L32 L33L34 L35 LED7 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R27 R28 R29 R30 R31 R32 R33 R34 R35 R3...

Page 27: ..._PCI20_D4 2 GND VCC 4 3 IC9B GND VCC 18 16 IC9C R87 R88 TP57 TP61 R96 S1 A B R97 T15B R98 TP66 TP75 TP77 TP78 TP79 TP80 VOUT 5 VIN 1 EN 3 GND 2 BP 4 IC11 C75 C76 C77 C78 R99 LED9 R100 R101 D5 R103 CON2 GND GND CON3 GND GND TP4 TP5 TP6 TP10 T17A 5 3 4 T15A GND 2 GND 2 GND 2 ANT_GPS ANT_GPS AGND 3 AGND 3 VMIC 3 VMIC 3 MICN1 3 MICN1 3 EPP1 3 EPP1 3 EPN1 3 EPN1 3 MICP1 3 MICP1 3 I2CCLK 2 I2CCLK 2 I2CD...

Page 28: ...R56 T5B 2 6 1 3 1 5 4 2 T10 T14A T14B R26 T11B T11A JP2 1 2 3 4 5 6 7 8 9 10 FLT 6 DVDT 1 EN UVLO 2 GND 8 2 ILM 7 IN 3 2 OUT 5 T6 3 1 5 4 2 T16 3 1 5 4 2 C57 R57 LED6 R63 IC10 IN 9 2 EN 7 GND 5 2 OUT 1 2 FB 3 SS 6 PB 4 R75 5 3 4 T1A 2 6 1 T1B R76 R77 R78 R79 R80 R81 C73 C74 D2 D1 R84 R85 CON17 P 1 P 2 P 3 P 4 P 5 P 10 P 6 2 P 8 2 P 11 CON18 P 1 P 2 P 3 P 4 P 5 P 10 P 6 2 P 8 2 P 11 R60 R86 R90 R91...

Page 29: ... 5 A2 3 B2 6 VCC A 1 VCC B 8 GND 4 C59 C61 C62 C63 C64 C65 C66 JP6 1 2 3 4 5 6 7 8 9 10 11 12 JP7 1 2 3 4 SCL 1 VSS 2 SDA 3 VCC 4 NC 5 TP52 TP53 TP54 TP55 C67 C68 C69 C70 C71 R82 C72 T3A R83 TP59 TP60 T3B R89 TP11 TP12 TP16 TP17 TP18 TP73 TP74 TP82 TP83 D4 RTS0_X100 2 RTS0_X100 2 CTS0_X100 2 CTS0_X100 2 DTR0_X100 2 DTR0_X100 2 DSR0_X100 2 DSR0_X100 2 DCD0_X100 2 DCD0_X100 2 TXD0_X100 2 TXD0_X100 2...

Page 30: ... C31 C32 C33 C34 C39 C46 C47 C48 C50 C51 C52 C53 C57 C59 C60 C61 C62 C63 C64 C65 C66 C67 C68 C69 C70 C71 C72 C73 C74 C75 C76 C77 C78 CON8 D1 D2 D3 D5 IC1 IC2 IC3 IC4 IC5 IC6 IC7 IC9 IC10 IC11 IC14 IC15 IC16 IC17 IC18 IC19 IC20 IC21 IC22 IC99 JP1 JP7 L28 L29 L30 L31 L32 L33 L34 L35 LED7 LED8 PATCHFIELD R1 R2 R3 R4 R5 R6 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 R27 R28 R29 R30 R31 R32...

Page 31: ... DNU17 DNU18 DNU19 PATCHFIELD_BOTTOM P 1 P 2 P 3 P 4 P 5 P 10 P 6 2 P 8 2 P 11 CON17 TP58 R3 JP1 1 2 3 4 LED8 GND 2 GND 2 GND 2 GND 2 ANT_GPS ANT_GPS AGND 3 AGND 3 VMIC 3 VMIC 3 MICN1 3 MICN1 3 EPP1 3 EPP1 3 EPN1 3 EPN1 3 MICP1 3 MICP1 3 I2CCLK 2 I2CCLK 2 I2CDAT 2 I2CDAT 2 ADC1 3 ADC1 3 FSDAI 3 FSDAI 3 RXDAI 3 RXDAI 3 TXDAI 3 TXDAI 3 GPIO8 3 GPIO8 3 GPIO7 3 GPIO7 3 GPIO6 3 GPIO6 3 GPIO5 3 GPIO5 3 ...

Page 32: ...3 R53 R54 R55 C48 R56 T5B 2 6 1 3 1 5 4 2 T10 T14A T14B R26 T11B T11A JP2 1 2 3 4 5 6 7 8 9 10 FLT 6 DVDT 1 EN UVLO 2 GND 8 2 ILM 7 IN 3 2 OUT 5 T6 3 1 5 4 2 T16 3 1 5 4 2 C57 R57 LED6 R63 IC10 IN 9 2 EN 7 GND 5 2 OUT 1 2 FB 3 SS 6 PB 4 R75 5 3 4 T1A 2 6 1 T1B R76 R77 R78 R79 R80 R81 C73 C74 D2 D1 R85 CON18 P 1 P 2 P 3 P 4 P 5 P 10 P 6 2 P 8 2 P 11 R60 R86 R90 R91 R92 T8B R93 R94 R95 TP62 TP63 TP6...

Page 33: ...2 C63 C64 C65 C66 JP6 1 2 3 4 5 6 7 8 9 10 11 12 JP7 1 2 3 4 SCL 1 VSS 2 SDA 3 VCC 4 NC 5 TP52 TP53 TP54 TP55 C67 C68 C69 C70 C71 R82 C72 T3A R83 TP59 TP60 T3B R89 TP11 TP12 TP16 TP17 TP18 TP73 TP74 TP82 TP83 D4 TP56 TP84 TP85 TP86 TP87 TP88 TP89 TP90 TP91 RTS0_X100 2 RTS0_X100 2 CTS0_X100 2 CTS0_X100 2 DTR0_X100 2 DTR0_X100 2 DSR0_X100 2 DSR0_X100 2 DCD0_X100 2 DCD0_X100 2 TXD0_X100 2 TXD0_X100 2...

Page 34: ...GA DevKit s PCB revision B22 built in a smaller quantity has a limited footprint detec tion Modules with bold lettering QUALCOMM e g EXS81 or wrongly positioned RohS sym bol e g ELS61 81 on the module s underside might be detected as a wrong footprint and will therefore not be powered up This limitation has been improved in conjunction with the socket s module footprint PCB B22 Error LED TXD0 LED ...

Page 35: ... Figure 20 and Figure 21 shows measurements with the old LGA DevKit socket re garding the S11 DevKit s MAIN antenna module RF path as well as the S21 DevKit s MAIN an tenna RF path loss Measurement results for the new LGA DevKit socket are shown above in Section 4 11 Figure 20 S11 MAIN antenna input return loss transmit direction with old socket Figure 21 S21 MAIN antenna insertion loss transmit d...

Page 36: ...ALES DIS AIS Deutschland GmbH Werinherstrasse 81 81541 Munich Germany Thales 2020 All rights reserved Thales the Thales logo are trademarks and service marks of Thales and are registered in certain countries ...

Reviews:

No comments