Test Procedure
7
Test Procedure
The
UCD90240EVM-704_Default_Configuration.xml
file is found in the
zip file on the TI website
and is provided to allow the user to return the EVM to its originally configured state.
Connect the EVM as shown in
: UCD90240 Recommended Test Setup. Apply the input voltage to
the test setup. Open the Fusion Digital Power Designer GUI by navigating to the Start
→
Texas
Instruments Fusion Digital Power Designer
→
Fusion Digital Power Designer (not the offline version which
would have monitoring disabled). At the default Configuration Screen select the File
→
Import Project and
the Project Open Wizard window will open. Open the default configuration file (UCD90240EVM-
704_Default_Configuration.xml) and click Next. Follow the prompt to download the configuration file.
7.1
Voltage Monitoring Example
In the default configuration file, all MON pins are assigned to corresponding rails. Apply an external
voltage within the specification in
to a MON pin. The voltage applied on the MON pin will be
displayed in the Fusion GUI
→
Monitor page.
7.2
Rail Enable Example
In the default configuration file, all EN pins are assigned to corresponding rails, and all rails are controlled
by CONTROL pin. The pin assignments are shown in Fusion GUI
→
Configure page
→
Pin Assignment
tab. The CONTROL pin status can be controlled in Fusion GUI
→
Monitor page. Turn on the CONTROL
Line in the Monitor page. Observe that all LEDs attached to EN pins are lit.
7.3
Fault Log Example (Including Blackbox Log)
Make sure the EN pin of a rail is asserted. Adjust the external voltage applied to the rail’s MON pin such
that the voltage is above Power Good On threshold and below OV Warn/Fault thresholds. In the Status
page, click the Clear Faults button, Clear Logged Faults button, and Clear Blackbox Log button.
Adjust the external voltage applied to the MON pin such that the voltage is above OV fault threshold. In
the Status page
→
Status Registers tab, observe that the Vout OV Fault of the corresponding rail is
raised. In the Logged Faults tab, observe that the Vout OV Fault of the corresponding rail is also raised. In
the Blackbox Info tab, click Refresh Blackbox Log button. Observe that the fault information and all the
GPI/GPO/Rail statuses when the fault occurred were recorded in the Blackbox Log.
7.4
Command GPO Example
In the default configuration file, 12 GPIO pins are configured as command GPO. In the Configure page
→
Pin Assignment tab, change the Command GPO states and then click the Write to Hardware button.
Observe the LED of the corresponding GPO pin changes state.
7.5
Configurable Pullup/Pulldown Signals
The UCD90240EVM-704 provides 32 configurable pullup/pulldown signals. The output pins of the
pullup/pulldown signals are located in J17, J18, J19, and J20. Each pin is connected to 3.3 V or GND
through a 680-
Ω
resistor. The state of each pin can be configured by a 3-pin header next to it. The
pullup/pulldown signals can be used as GPI pin input signals and pull up for open-drain GPO pins.
7.6
GPI and Logic GPO Example
In the default configuration file, 12 GPIO pins are configured as GPI pin with GPI Fault feature enabled.
Each of the 12 LGPO pins is configured to follow a corresponding GPI signal with a 960-ms time delay.
The pin assignments are shown in the Configure page
→
Pin Assignment tab.
Connect a logic input signal to a GPI pin. Observe that the LED of the corresponding LGPO pin is lit after
960 ms. Also observe that the corresponding GPI Fault is logged in the Status page. Disconnect the logic
input signal from the GPI pin. Observe that the LED of the corresponding LGPO pin is out after 960 ms.
14
UCD90240EVM-704 24-Rail Sequencer Development Board
SLVUAF3A – March 2015 – Revised March 2015
Copyright © 2015, Texas Instruments Incorporated