FIFO Access
www.ti.com
6
FIFO Access
The internal 512-byte FIFO is used primarily for high-bandwidth teletext acquisition but can also be used
for capture of the other data services. The FIFO can be directly accessed by the host at I
2
C address B0h.
Bit 0 of the VDP FIFO output control register (CDh) must be set to logic 1 to enable host access to the
FIFO. A header containing information about the sliced data precedes all sliced data that is routed to the
FIFO. A VDP FIFO Interrupt threshold register (C8h), FIFO word count register (C7h), and FIFO full/empty
status bits (C6h) are available for managing FIFO data flow.
8
TVP5154A VBI Quick Start
SLEA104 – July 2010
Copyright © 2010, Texas Instruments Incorporated
